[coreboot-gerrit] Change in coreboot[master]: security/tpm: Move tpm TSS and TSPI layer to security section

Philipp Deppenwiese (Code Review) gerrit at coreboot.org
Wed Oct 18 17:32:38 CEST 2017


Hello build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/22103

to look at the new patch set (#2).

Change subject: security/tpm: Move tpm TSS and TSPI layer to security section
......................................................................

security/tpm: Move tpm TSS and TSPI layer to security section

* Move code from src/lib and src/include into src/security/tpm
* Split TPM TSS 1.2 and 2.0
* Fix header includes
* Add a new directory structure with kconfig and makefile includes

Change-Id: Id15a9aa6bd367560318dfcfd450bf5626ea0ec2b
Signed-off-by: Philipp Deppenwiese <zaolin at das-labor.org>
---
M src/Kconfig
M src/cpu/intel/haswell/romstage.c
M src/drivers/i2c/tpm/cr50.c
M src/drivers/i2c/tpm/tis.c
M src/drivers/i2c/tpm/tis_atmel.c
M src/drivers/i2c/tpm/tpm.c
M src/drivers/intel/fsp1_1/romstage.c
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/pc80/tpm/Kconfig
M src/drivers/pc80/tpm/romstage.c
M src/drivers/pc80/tpm/tpm.c
M src/drivers/spi/tpm/tis.c
M src/drivers/spi/tpm/tpm.c
M src/lib/Makefile.inc
M src/mainboard/asus/kgpe-d16/romstage.c
M src/mainboard/google/gru/chromeos.c
M src/mainboard/google/link/romstage.c
M src/mainboard/google/oak/tpm_tis.c
M src/mainboard/google/parrot/romstage.c
M src/mainboard/google/stout/romstage.c
M src/mainboard/intel/emeraldlake2/romstage.c
M src/mainboard/lenovo/x201/romstage.c
M src/mainboard/pcengines/apu2/romstage.c
M src/mainboard/samsung/lumpy/romstage.c
M src/mainboard/samsung/stumpy/romstage.c
M src/northbridge/intel/sandybridge/romstage.c
M src/security/Kconfig
M src/security/Makefile.inc
A src/security/tpm/Kconfig
A src/security/tpm/Makefile.inc
R src/security/tpm/antirollback.h
R src/security/tpm/tcg-1.2/tlcl.c
R src/security/tpm/tcg-1.2/tlcl_internal.h
R src/security/tpm/tcg-1.2/tlcl_structures.h
R src/security/tpm/tcg-2.0/tpm2_marshaling.c
R src/security/tpm/tcg-2.0/tpm2_marshaling.h
R src/security/tpm/tcg-2.0/tpm2_tlcl.c
R src/security/tpm/tcg-2.0/tpm2_tlcl_structures.h
R src/security/tpm/tlcl.h
R src/security/tpm/tpm.h
R src/security/tpm/tpm_error_messages.h
R src/security/tpm/tss_constants.h
M src/security/vboot/secdata_mock.c
M src/security/vboot/secdata_tpm.c
M src/security/vboot/vboot_logic.c
M src/soc/intel/baytrail/romstage/romstage.c
M src/soc/intel/braswell/romstage/romstage.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/common/tpm_tis.c
M src/vendorcode/google/chromeos/cr50_enable_update.c
M src/vendorcode/google/chromeos/tpm2.c
51 files changed, 126 insertions(+), 107 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/22103/2
-- 
To view, visit https://review.coreboot.org/22103
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Id15a9aa6bd367560318dfcfd450bf5626ea0ec2b
Gerrit-Change-Number: 22103
Gerrit-PatchSet: 2
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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