[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Use EBDA structure to store soc reserve memory size

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/22098


Change subject: soc/intel/skylake: Use EBDA structure to store soc reserve memory size
......................................................................

soc/intel/skylake: Use EBDA structure to store soc reserve memory size

Avoid calling calculate_dram_base() function to get chipset reserved
memory size during pci resource allocation. Rather use EBDA to store
chipset reserved memory size while calling cbmem_top_int().

This patch avoids one extra calculate_dram_base() call.

BRANCH=none
BUG=b:63974384
TEST=Ensures DRAM based resource allocation has taken care of Intel
SoC reserved ranges.

Change-Id: I52f359db5a712179d7f2accb4d323d759f3b052b
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/skylake/include/soc/ebda.h
M src/soc/intel/skylake/memmap.c
2 files changed, 10 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/22098/1

diff --git a/src/soc/intel/skylake/include/soc/ebda.h b/src/soc/intel/skylake/include/soc/ebda.h
index 4cde5c0..af32899 100644
--- a/src/soc/intel/skylake/include/soc/ebda.h
+++ b/src/soc/intel/skylake/include/soc/ebda.h
@@ -19,6 +19,7 @@
 struct ebda_config {
 	uint32_t signature; /* 0x00 - EBDA signature */
 	uint32_t tolum_base; /* 0x04 - coreboot memory start */
+	size_t reserved_mem_size; /* 0x08 - chipset reserved memory size */
 };
 
 #endif
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index eaf7d07..a2a1bee 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -285,12 +285,17 @@
  */
 size_t soc_reserved_mmio_size(void)
 {
-	size_t chipset_mem_size;
+	struct ebda_config *cfg;
 
-	calculate_dram_base(&chipset_mem_size);
+	cfg = malloc(sizeof(*cfg));
+
+	if (cfg == NULL)
+		return 0;
+
+	retrieve_ebda_object(cfg);
 
 	/* Get Intel Reserved Memory Range Size */
-	return chipset_mem_size;
+	return cfg->reserved_mem_size;
 }
 
 /* Fill up memory layout information */
@@ -299,6 +304,7 @@
 	size_t chipset_mem_size;
 
 	cfg->tolum_base = calculate_dram_base(&chipset_mem_size);
+	cfg->reserved_mem_size = chipset_mem_size;
 }
 
 void cbmem_top_init(void)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I52f359db5a712179d7f2accb4d323d759f3b052b
Gerrit-Change-Number: 22098
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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