<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22098">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/skylake: Use EBDA structure to store soc reserve memory size<br><br>Avoid calling calculate_dram_base() function to get chipset reserved<br>memory size during pci resource allocation. Rather use EBDA to store<br>chipset reserved memory size while calling cbmem_top_int().<br><br>This patch avoids one extra calculate_dram_base() call.<br><br>BRANCH=none<br>BUG=b:63974384<br>TEST=Ensures DRAM based resource allocation has taken care of Intel<br>SoC reserved ranges.<br><br>Change-Id: I52f359db5a712179d7f2accb4d323d759f3b052b<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/skylake/include/soc/ebda.h<br>M src/soc/intel/skylake/memmap.c<br>2 files changed, 10 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/22098/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/skylake/include/soc/ebda.h b/src/soc/intel/skylake/include/soc/ebda.h<br>index 4cde5c0..af32899 100644<br>--- a/src/soc/intel/skylake/include/soc/ebda.h<br>+++ b/src/soc/intel/skylake/include/soc/ebda.h<br>@@ -19,6 +19,7 @@<br> struct ebda_config {<br>      uint32_t signature; /* 0x00 - EBDA signature */<br>       uint32_t tolum_base; /* 0x04 - coreboot memory start */<br>+      size_t reserved_mem_size; /* 0x08 - chipset reserved memory size */<br> };<br> <br> #endif<br>diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c<br>index eaf7d07..a2a1bee 100644<br>--- a/src/soc/intel/skylake/memmap.c<br>+++ b/src/soc/intel/skylake/memmap.c<br>@@ -285,12 +285,17 @@<br>  */<br> size_t soc_reserved_mmio_size(void)<br> {<br>- size_t chipset_mem_size;<br>+     struct ebda_config *cfg;<br> <br>-  calculate_dram_base(&chipset_mem_size);<br>+  cfg = malloc(sizeof(*cfg));<br>+<br>+       if (cfg == NULL)<br>+             return 0;<br>+<br>+ retrieve_ebda_object(cfg);<br> <br>         /* Get Intel Reserved Memory Range Size */<br>-   return chipset_mem_size;<br>+     return cfg->reserved_mem_size;<br> }<br> <br> /* Fill up memory layout information */<br>@@ -299,6 +304,7 @@<br>       size_t chipset_mem_size;<br> <br>   cfg->tolum_base = calculate_dram_base(&chipset_mem_size);<br>+     cfg->reserved_mem_size = chipset_mem_size;<br> }<br> <br> void cbmem_top_init(void)<br></pre><p>To view, visit <a href="https://review.coreboot.org/22098">change 22098</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22098"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I52f359db5a712179d7f2accb4d323d759f3b052b </div>
<div style="display:none"> Gerrit-Change-Number: 22098 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>