[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Prevent false logs in pch_xhci_port_wake_check

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/22088


Change subject: soc/intel/skylake: Prevent false logs in pch_xhci_port_wake_check
......................................................................

soc/intel/skylake: Prevent false logs in pch_xhci_port_wake_check

1. Ensure that port_status read is not all 1s to ensure that read from
mmio address returned valid data.
2. If device connect/disconnect shows that it was a wake source, there
is no need to check for usb activity.

BUG=b:67874513

Change-Id: Id8b4a1fec7bfe530fe435a0f52944b273cdd89ad
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
M src/soc/intel/skylake/elog.c
1 file changed, 5 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/22088/1

diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c
index 8240457..2be6b7b 100644
--- a/src/soc/intel/skylake/elog.c
+++ b/src/soc/intel/skylake/elog.c
@@ -101,6 +101,10 @@
 		/* Read port status and control register for the port. */
 		port_status = read32((void *)base);
 
+		/* Ensure that the status is not all 1s. */
+		if (port_status == 0xffffffff)
+			continue;
+
 		/*
 		 * Check if CSC bit is set and port is capable of wake on
 		 * connect/disconnect to identify if the port caused wake
@@ -110,6 +114,7 @@
 		    pch_xhci_wake_capable(port_status)) {
 			elog_add_event_wake(event, i + 1);
 			found = true;
+			continue;
 		}
 
 		/*

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id8b4a1fec7bfe530fe435a0f52944b273cdd89ad
Gerrit-Change-Number: 22088
Gerrit-PatchSet: 1
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
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