[coreboot-gerrit] Change in coreboot[master]: purism/librem13v2: Change DRAM Rcomp/DQS values

[Youness Alaoui (Code Review)]

Youness Alaoui has uploaded this change for review. ( https://review.coreboot.org/22041


Change subject: purism/librem13v2: Change DRAM Rcomp/DQS values
......................................................................

purism/librem13v2: Change DRAM Rcomp/DQS values

The RComp values have been updated to match what is shown in the schematics.

Extracting the Memory configuration blob from the original BIOS (A blob
which contains the correct binary sequence matching the RComp values appears
in object with GUID 2D27C618-7DCD-41F5-BB10-21166BE7E143), I could find
and confirm the DQ and DQS mapping.

Small code cleaning in romstage.c with no effect.

Change-Id: I35c734269b365fd759e9bd56224a80a8a8df5a57
Signed-off-by: Youness Alaoui <youness.alaoui at puri.sm>
---
M src/mainboard/purism/librem13v2/pei_data.c
M src/mainboard/purism/librem13v2/romstage.c
2 files changed, 6 insertions(+), 5 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/22041/1

diff --git a/src/mainboard/purism/librem13v2/pei_data.c b/src/mainboard/purism/librem13v2/pei_data.c
index 84f38d9..730b730 100644
--- a/src/mainboard/purism/librem13v2/pei_data.c
+++ b/src/mainboard/purism/librem13v2/pei_data.c
@@ -29,14 +29,14 @@
 		    0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 } };
 	/* DQS CPU<>DRAM map */
 	const u8 dqs_map[2][8] = {
-		{ 0, 3, 1, 2, 4, 5, 6, 7 },
+		{ 0, 1, 3, 2, 4, 5, 6, 7 },
 		{ 1, 0, 4, 5, 2, 3, 6, 7 } };
 
 	/* Rcomp resistor */
-	const u16 RcompResistor[3] = { 200, 81, 162 };
+	const u16 RcompResistor[3] = { 121, 81, 100 };
 
 	/* Rcomp target */
-	const u16 RcompTarget[5] = { 100, 40, 40, 23, 40 };
+	const u16 RcompTarget[5] = { 100, 40, 20, 20, 26 };
 
 	memcpy(pei_data->dq_map, dq_map, sizeof(dq_map));
 	memcpy(pei_data->dqs_map, dqs_map, sizeof(dqs_map));
diff --git a/src/mainboard/purism/librem13v2/romstage.c b/src/mainboard/purism/librem13v2/romstage.c
index c8c3cd9..fc940e1 100644
--- a/src/mainboard/purism/librem13v2/romstage.c
+++ b/src/mainboard/purism/librem13v2/romstage.c
@@ -38,11 +38,11 @@
 		.addr_map = { 0x50 },
 	};
 
-	memory_params->DqPinsInterleaved = 1;
 	get_spd_smbus(&blk);
 	dump_spd_info(&blk);
-	memory_params->MemorySpdDataLen = blk.len;
 	assert(blk.spd_array[0][0] != 0);
+
+	memory_params->MemorySpdDataLen = blk.len;
 	memory_params->MemorySpdPtr00 = (uintptr_t) blk.spd_array[0];
 	memory_params->MemorySpdPtr01 = 0;
 	memory_params->MemorySpdPtr10 = 0;
@@ -60,5 +60,6 @@
 		sizeof(params->pei_data->RcompResistor));
 	memcpy(memory_params->RcompTarget, params->pei_data->RcompTarget,
 		sizeof(params->pei_data->RcompTarget));
+	memory_params->DqPinsInterleaved = TRUE;
 
 }

-- 
To view, visit https://review.coreboot.org/22041
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I35c734269b365fd759e9bd56224a80a8a8df5a57
Gerrit-Change-Number: 22041
Gerrit-PatchSet: 1
Gerrit-Owner: Youness Alaoui <snifikino at gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier at gmail.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20171016/3378dfe2/attachment-0001.html>