[coreboot-gerrit] Change in coreboot[master]: console/flashconsole: Enable support for postcar

[Youness Alaoui (Code Review)]

Youness Alaoui has uploaded this change for review. ( https://review.coreboot.org/21959


Change subject: console/flashconsole: Enable support for postcar
......................................................................

console/flashconsole: Enable support for postcar

If FSP 2.0 is used, then postcar stage is used and the flashconsole
as well as spi drivers needed to be added.

Change-Id: I46d720a9d1fe18a95c9407d08dae1eb70ae6720e
Signed-off-by: Youness Alaoui <youness.alaoui at puri.sm>
---
M src/drivers/spi/Makefile.inc
M src/soc/intel/common/block/gspi/Makefile.inc
M src/soc/intel/skylake/Makefile.inc
3 files changed, 8 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/21959/1

diff --git a/src/drivers/spi/Makefile.inc b/src/drivers/spi/Makefile.inc
index c594d4e..a7cf3a7 100644
--- a/src/drivers/spi/Makefile.inc
+++ b/src/drivers/spi/Makefile.inc
@@ -11,6 +11,7 @@
 bootblock-y += flashconsole.c
 romstage-y += flashconsole.c
 ramstage-y += flashconsole.c
+postcar-y += flashconsole.c
 smm-$(CONFIG_DEBUG_SMI) += flashconsole.c
 
 endif
@@ -98,3 +99,7 @@
 smm-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
 smm-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
 endif
+
+postcar-y += spi-generic.c
+postcar-$(CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY) += boot_device_rw_nommap.c
+postcar-$(CONFIG_SPI_FLASH) += spi_flash.c
\ No newline at end of file
diff --git a/src/soc/intel/common/block/gspi/Makefile.inc b/src/soc/intel/common/block/gspi/Makefile.inc
index 85cb18e..2eb13fa 100644
--- a/src/soc/intel/common/block/gspi/Makefile.inc
+++ b/src/soc/intel/common/block/gspi/Makefile.inc
@@ -2,3 +2,4 @@
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c
 verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c
+postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index d12ba08..9a8372b 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -82,6 +82,8 @@
 
 postcar-y += memmap.c
 postcar-$(CONFIG_UART_DEBUG) += uart_debug.c
+postcar-y += gspi.c
+postcar-y += spi.c
 
 # cpu_microcode_bins += ???
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I46d720a9d1fe18a95c9407d08dae1eb70ae6720e
Gerrit-Change-Number: 21959
Gerrit-PatchSet: 1
Gerrit-Owner: Youness Alaoui <snifikino at gmail.com>
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