[coreboot-gerrit] Change in coreboot[master]: intel/skylake: Use Sata related registers from devicetree

[Youness Alaoui (Code Review)]

Youness Alaoui has uploaded this change for review. ( https://review.coreboot.org/21958


Change subject: intel/skylake: Use Sata related registers from devicetree
......................................................................

intel/skylake: Use Sata related registers from devicetree

Enable the use of the SataPortsEnable and SataPortsDevSlp registers
which were being ignored from the devicetree and were not affecting
the resulting UPD parameters.

SataPortsEnable was only being copied for the first SATA port, while
the other ports were left ignored.

Change-Id: Iae70a4d6375fa5d1b05ee89f6b97c65dbbf28dda
Signed-off-by: Youness Alaoui <youness.alaoui at puri.sm>
---
M src/soc/intel/skylake/chip.c
1 file changed, 4 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/21958/1

diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 7014c24..dfa813a 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -132,7 +132,10 @@
 	params->EnableLan = config->EnableLan;
 	params->Cio2Enable = config->Cio2Enable;
 	params->SataSalpSupport = config->SataSalpSupport;
-	params->SataPortsEnable[0] = config->SataPortsEnable[0];
+	memcpy(params->SataPortsEnable, config->SataPortsEnable,
+			sizeof(params->SataPortsEnable));
+	memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp,
+			sizeof(params->SataPortsDevSlp));
 	params->SsicPortEnable = config->SsicPortEnable;
 	params->SmbusEnable = config->SmbusEnable;
 	params->ScsEmmcEnabled = config->ScsEmmcEnabled;

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iae70a4d6375fa5d1b05ee89f6b97c65dbbf28dda
Gerrit-Change-Number: 21958
Gerrit-PatchSet: 1
Gerrit-Owner: Youness Alaoui <snifikino at gmail.com>
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