[coreboot-gerrit] Change in coreboot[master]: intel/fsp_broadwell_de: Add timestamp functionality

[Werner Zeh (Code Review)]

Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/21932


Change subject: intel/fsp_broadwell_de: Add timestamp functionality
......................................................................

intel/fsp_broadwell_de: Add timestamp functionality

Add a little code and set the Kconfig switch to enable timestamps on
FSP based implementation of Broadwell-DE. I have tested it by reading
back the timestamps with cbmem utility once the board has booted into
Lubuntu.

Change-Id: Idaa65a22a00382bf0c37acf2f5a1e07c6b1b42d9
Signed-off-by: Werner Zeh <werner.zeh at siemens.com>
---
M src/soc/intel/fsp_broadwell_de/Kconfig
M src/soc/intel/fsp_broadwell_de/Makefile.inc
M src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h
A src/soc/intel/fsp_broadwell_de/tsc_freq.c
4 files changed, 35 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/21932/1

diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig
index cfe3fb0..06b9ee2 100644
--- a/src/soc/intel/fsp_broadwell_de/Kconfig
+++ b/src/soc/intel/fsp_broadwell_de/Kconfig
@@ -25,6 +25,7 @@
 	select HAVE_INTEL_FIRMWARE
 	select SMM_TSEG
 	select HAVE_SMI_HANDLER
+	select COLLECT_TIMESTAMPS
 
 config CBFS_SIZE
 	hex
diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc
index 028c45d..38cc441 100644
--- a/src/soc/intel/fsp_broadwell_de/Makefile.inc
+++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc
@@ -16,6 +16,7 @@
 ramstage-y += chip.c
 ramstage-y += northcluster.c
 ramstage-y += ramstage.c
+ramstage-y += tsc_freq.c
 romstage-y += memmap.c
 ramstage-y += memmap.c
 ramstage-y += southcluster.c
@@ -24,11 +25,13 @@
 ramstage-y += acpi.c
 ramstage-y += smbus_common.c
 ramstage-y += smbus.c
+romstage-y += tsc_freq.c
 ramstage-y += smi.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
 
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/include
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/fsp
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h
index 4c11f38..dc1ec19 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h
@@ -26,4 +26,7 @@
 #define TSEG_BASE		0xa8	/* TSEG base */
 #define TSEG_LIMIT		0xac	/* TSEG limit */
 
+/* CPU bus clock is fixed at 100MHz */
+#define CPU_BCLK		100
+
 #endif /* _SOC_BROADWELL_DE_H_ */
diff --git a/src/soc/intel/fsp_broadwell_de/tsc_freq.c b/src/soc/intel/fsp_broadwell_de/tsc_freq.c
new file mode 100644
index 0000000..4225a3a
--- /dev/null
+++ b/src/soc/intel/fsp_broadwell_de/tsc_freq.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/tsc.h>
+#include <soc/msr.h>
+#include <soc/broadwell_de.h>
+
+unsigned long tsc_freq_mhz(void)
+{
+	msr_t platform_info;
+
+	platform_info = rdmsr(MSR_PLATFORM_INFO);
+	return CPU_BCLK * ((platform_info.lo >> 8) & 0xff);
+}

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Idaa65a22a00382bf0c37acf2f5a1e07c6b1b42d9
Gerrit-Change-Number: 21932
Gerrit-PatchSet: 1
Gerrit-Owner: Werner Zeh <werner.zeh at siemens.com>
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