[coreboot-gerrit] Change in coreboot[master]: [WIP] nb/via/cn700: Switch to early cbmem init

[Jonathan Neuschäfer (Code Review)]

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/21894


Change subject: [WIP] nb/via/cn700: Switch to early cbmem init
......................................................................

[WIP] nb/via/cn700: Switch to early cbmem init

This patch currently has one very big and non-obvious (from looking at
the source) problem: If EARLY_CBMEM_INIT is enabled, I don't see *any*
output on the serial console, not even "coreboot-[...] romstage
starting..."

The stylistic problems of this patch are more obvious.

Change-Id: I9bffa2e11f07c0ed3232fb5a3e165ab81029beee
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
M src/mainboard/winnet/g170/romstage.c
M src/northbridge/via/cn700/Kconfig
M src/northbridge/via/cn700/Makefile.inc
M src/northbridge/via/cn700/northbridge.c
M src/northbridge/via/cn700/ram_calc.c
5 files changed, 25 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/21894/1

diff --git a/src/mainboard/winnet/g170/romstage.c b/src/mainboard/winnet/g170/romstage.c
index 0703ba6..e288feb 100644
--- a/src/mainboard/winnet/g170/romstage.c
+++ b/src/mainboard/winnet/g170/romstage.c
@@ -20,6 +20,7 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
+#include <cbmem.h>
 #include <console/console.h>
 #include <northbridge/via/cn700/raminit.h>
 #include <cpu/x86/bist.h>
@@ -91,4 +92,6 @@
 	enable_mainboard_devices();
 
 	ddr_ram_setup(&ctrl);
+
+	cbmem_initialize_empty();
 }
diff --git a/src/northbridge/via/cn700/Kconfig b/src/northbridge/via/cn700/Kconfig
index 1619ff1..6e656e7 100644
--- a/src/northbridge/via/cn700/Kconfig
+++ b/src/northbridge/via/cn700/Kconfig
@@ -2,7 +2,6 @@
 	bool
 	select NO_MMCONF_SUPPORT
 	select HAVE_DEBUG_RAM_SETUP
-	select LATE_CBMEM_INIT
 
 # TODO: Values are from the CX700 datasheet, not sure if this matches CN700.
 # TODO: What should be the per-chipset default value here?
diff --git a/src/northbridge/via/cn700/Makefile.inc b/src/northbridge/via/cn700/Makefile.inc
index 977460b..ac10da8 100644
--- a/src/northbridge/via/cn700/Makefile.inc
+++ b/src/northbridge/via/cn700/Makefile.inc
@@ -21,5 +21,6 @@
 ramstage-y += vga.c
 ramstage-y += ram_calc.c
 romstage-y += raminit.c
+romstage-y += ram_calc.c
 
 endif
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c
index 1ea4e51..c4cccd8 100644
--- a/src/northbridge/via/cn700/northbridge.c
+++ b/src/northbridge/via/cn700/northbridge.c
@@ -103,8 +103,6 @@
 
 	tolmk = cn700_get_tolmk(dev);
 
-	set_late_cbmem_top((tolmk - CONFIG_VIDEO_MB * 1024) * 1024);
-
 	/* Report the memory regions. */
 	idx = 10;
 	/* TODO: Hole needed? */
diff --git a/src/northbridge/via/cn700/ram_calc.c b/src/northbridge/via/cn700/ram_calc.c
index 3686bf4..371d6cb 100644
--- a/src/northbridge/via/cn700/ram_calc.c
+++ b/src/northbridge/via/cn700/ram_calc.c
@@ -16,6 +16,7 @@
  * GNU General Public License for more details.
  */
 
+#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -33,11 +34,19 @@
 	unsigned char rambits;
 	int i;
 	device_t mc_dev;
-	u32 pci_tolm;
 
+	printk(BIOS_DEBUG, "%s entered\n", __func__);
+
+#ifndef __SIMPLE_DEVICE__
+	u32 pci_tolm;
 	pci_tolm = find_pci_tolm(dev->link_list);
+#endif
+#ifdef __SIMPLE_DEVICE__
+	mc_dev = PCI_DEVFN(3, 0);
+#else
 	mc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
 				 PCI_DEVICE_ID_VIA_CN700_MEMCTRL, 0);
+#endif
 
 	if (!mc_dev)
 		die("Error: Memory controller device not found!\n");
@@ -55,7 +64,11 @@
 	tomk = rambits * 64 * 1024;
 	printk(BIOS_DEBUG, "tomk is 0x%lx\n", tomk);
 	/* Compute the Top Of Low Memory (TOLM), in Kb. */
+#ifdef __SIMPLE_DEVICE__
+	tolmk = ~0;
+#else
 	tolmk = pci_tolm >> 10;
+#endif
 	if (tolmk >= tomk) {
 		/* The PCI hole does does not overlap the memory. */
 		tolmk = tomk;
@@ -63,3 +76,10 @@
 
 	return tolmk;
 }
+
+void *cbmem_top(void)
+{
+	unsigned long top = cn700_get_tolmk(0) - CONFIG_VIDEO_MB * 1024;
+
+	return (void *)(top * 1024);
+}

-- 
To view, visit https://review.coreboot.org/21894
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I9bffa2e11f07c0ed3232fb5a3e165ab81029beee
Gerrit-Change-Number: 21894
Gerrit-PatchSet: 1
Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20171005/c2769738/attachment-0001.html>