[coreboot-gerrit] Change in coreboot[master]: intel/cannonlake_rvp: Enabale Audio DSP

Lijian Zhao (Code Review) gerrit at coreboot.org
Thu Oct 5 03:37:17 CEST 2017


Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/21888


Change subject: intel/cannonlake_rvp: Enabale Audio DSP
......................................................................

intel/cannonlake_rvp: Enabale Audio DSP

Enable Audio DSP by default on cannonlake rvp platform.

TEST=Boot up into OS and check Audio driver debug print.

Change-Id: I6892c6d349019550c967ef30b84d385f396fc388
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
2 files changed, 6 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/21888/1

diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
index 119af48..13c721b 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
@@ -32,6 +32,9 @@
 	register "SataPortsEnable[0]" = "1"
 	register "SataPortsEnable[1]" = "1"
 
+	register "PchHdaDspEnable" = "1"
+	register "PchHdaAudioLinkHda" = "1"
+
 	device domain 0 on
 		device pci 00.0 on  end # Host Bridge
 		device pci 02.0 on  end # Integrated Graphics Device
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
index 6e7c535..b1e7c66 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
@@ -32,6 +32,9 @@
 	register "SataPortsEnable[0]" = "1"
 	register "SataPortsEnable[1]" = "1"
 
+	register "PchHdaDspEnable" = "1"
+	register "PchHdaAudioLinkHda" = "1"
+
 	device domain 0 on
 		device pci 00.0 on  end # Host Bridge
 		device pci 02.0 on  end # Integrated Graphics Device

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6892c6d349019550c967ef30b84d385f396fc388
Gerrit-Change-Number: 21888
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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