[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Remove unused S3 NVRAM save/restore

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22650


Change subject: amd/stoneyridge: Remove unused S3 NVRAM save/restore
......................................................................

amd/stoneyridge: Remove unused S3 NVRAM save/restore

Remove the BiosRam read and write functions that were brought over from
the hudson source.  The functionality will be superseded later with new
general-purpose functions.

Change-Id: Iaea2da89a46d7e1e8f608396a2cd01c6f8bb6660
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/stoneyridge/early_setup.c
M src/soc/amd/stoneyridge/include/soc/southbridge.h
2 files changed, 0 insertions(+), 33 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/22650/1

diff --git a/src/soc/amd/stoneyridge/early_setup.c b/src/soc/amd/stoneyridge/early_setup.c
index ec3baa4..84892db 100644
--- a/src/soc/amd/stoneyridge/early_setup.c
+++ b/src/soc/amd/stoneyridge/early_setup.c
@@ -206,37 +206,6 @@
 	lpc_wideio_window(base, 16);
 }
 
-int s3_save_nvram_early(u32 dword, int size, int  nvram_pos)
-{
-	int i;
-	printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n",
-					dword, size, nvram_pos);
-
-	for (i = 0; i < size; i++) {
-		outb(nvram_pos, BIOSRAM_INDEX);
-		outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);
-		nvram_pos++;
-	}
-
-	return nvram_pos;
-}
-
-int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
-{
-	u32 data = *old_dword;
-	int i;
-	for (i = 0; i < size; i++) {
-		outb(nvram_pos, BIOSRAM_INDEX);
-		data &= ~(0xff << (i * 8));
-		data |= inb(BIOSRAM_DATA) << (i * 8);
-		nvram_pos++;
-	}
-	*old_dword = data;
-	printk(BIOS_DEBUG, "Loading %x of size %d to nvram pos:%d\n",
-					*old_dword, size, nvram_pos-size);
-	return nvram_pos;
-}
-
 void sb_clk_output_48Mhz(void)
 {
 	u32 ctrl;
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 1cecda6..da3075c 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -302,8 +302,6 @@
 void biosram_write32(uint8_t offset, uint32_t value);
 uint16_t pm_acpi_pm_cnt_blk(void);
 uint16_t pm_acpi_pm_evt_blk(void);
-int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
-int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 void bootblock_fch_early_init(void);
 
 #endif /* __STONEYRIDGE_H__ */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaea2da89a46d7e1e8f608396a2cd01c6f8bb6660
Gerrit-Change-Number: 22650
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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