<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22650">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Remove unused S3 NVRAM save/restore<br><br>Remove the BiosRam read and write functions that were brought over from<br>the hudson source. The functionality will be superseded later with new<br>general-purpose functions.<br><br>Change-Id: Iaea2da89a46d7e1e8f608396a2cd01c6f8bb6660<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/stoneyridge/early_setup.c<br>M src/soc/amd/stoneyridge/include/soc/southbridge.h<br>2 files changed, 0 insertions(+), 33 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/22650/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/stoneyridge/early_setup.c b/src/soc/amd/stoneyridge/early_setup.c<br>index ec3baa4..84892db 100644<br>--- a/src/soc/amd/stoneyridge/early_setup.c<br>+++ b/src/soc/amd/stoneyridge/early_setup.c<br>@@ -206,37 +206,6 @@<br> lpc_wideio_window(base, 16);<br> }<br> <br>-int s3_save_nvram_early(u32 dword, int size, int nvram_pos)<br>-{<br>- int i;<br>- printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n",<br>- dword, size, nvram_pos);<br>-<br>- for (i = 0; i < size; i++) {<br>- outb(nvram_pos, BIOSRAM_INDEX);<br>- outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);<br>- nvram_pos++;<br>- }<br>-<br>- return nvram_pos;<br>-}<br>-<br>-int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)<br>-{<br>- u32 data = *old_dword;<br>- int i;<br>- for (i = 0; i < size; i++) {<br>- outb(nvram_pos, BIOSRAM_INDEX);<br>- data &= ~(0xff << (i * 8));<br>- data |= inb(BIOSRAM_DATA) << (i * 8);<br>- nvram_pos++;<br>- }<br>- *old_dword = data;<br>- printk(BIOS_DEBUG, "Loading %x of size %d to nvram pos:%d\n",<br>- *old_dword, size, nvram_pos-size);<br>- return nvram_pos;<br>-}<br>-<br> void sb_clk_output_48Mhz(void)<br> {<br> u32 ctrl;<br>diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h<br>index 1cecda6..da3075c 100644<br>--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h<br>+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h<br>@@ -302,8 +302,6 @@<br> void biosram_write32(uint8_t offset, uint32_t value);<br> uint16_t pm_acpi_pm_cnt_blk(void);<br> uint16_t pm_acpi_pm_evt_blk(void);<br>-int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);<br>-int s3_save_nvram_early(u32 dword, int size, int nvram_pos);<br> void bootblock_fch_early_init(void);<br> <br> #endif /* __STONEYRIDGE_H__ */<br></pre><p>To view, visit <a href="https://review.coreboot.org/22650">change 22650</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22650"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Iaea2da89a46d7e1e8f608396a2cd01c6f8bb6660 </div>
<div style="display:none"> Gerrit-Change-Number: 22650 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>