[coreboot-gerrit] Change in coreboot[master]: apollolake: move TCO1 disable into bootblock

[Vadim Bendebury (Code Review)]

Vadim Bendebury has uploaded this change for review. ( https://review.coreboot.org/22553


Change subject: apollolake: move TCO1 disable into bootblock
......................................................................

apollolake: move TCO1 disable into bootblock

Cr50 reset processing could take long time, up to 30 s in the worst
case. The TCO watchdog needs to be disabled before Cr50 driver starts,
let's disable it in bootblock.

BRANCH=none
BUG=b:65867313, b:68729265
TEST=verified that resetting the device while keys are being generated
     by the TPM does not cause falling into recovery.

Change-Id: Iaf1f97924590163e45bcac667b6c607503cc8b87
Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
---
M src/soc/intel/apollolake/bootblock/bootblock.c
M src/soc/intel/apollolake/romstage.c
2 files changed, 8 insertions(+), 11 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/22553/1

diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index f02d8cf..214d4fd 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -89,6 +89,8 @@
 
 void bootblock_soc_early_init(void)
 {
+	uint32_t reg;
+
 	enable_pmcbar();
 
 	/* Clear global reset promotion bit */
@@ -109,4 +111,10 @@
 
 	/* Initialize GPE for use as interrupt status */
 	pmc_gpe_init();
+
+	/* Stop TCO timer */
+	reg = inl(ACPI_PMIO_BASE + TCO1_CNT);
+	reg |= TCO_TMR_HLT;
+	outl(reg, ACPI_PMIO_BASE + TCO1_CNT);
+
 }
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index f315e61..a003ea0 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -99,16 +99,6 @@
 		lpc_io_setup_comm_a_b();
 }
 
-static void disable_watchdog(void)
-{
-	uint32_t reg;
-
-	/* Stop TCO timer */
-	reg = inl(ACPI_BASE_ADDRESS + TCO1_CNT);
-	reg |= TCO_TMR_HLT;
-	outl(reg, ACPI_BASE_ADDRESS + TCO1_CNT);
-}
-
 /*
  * Punit Initialization code. This all isn't documented, but
  * this is the recipe.
@@ -202,7 +192,6 @@
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	soc_early_romstage_init();
-	disable_watchdog();
 
 	console_init();
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaf1f97924590163e45bcac667b6c607503cc8b87
Gerrit-Change-Number: 22553
Gerrit-PatchSet: 1
Gerrit-Owner: Vadim Bendebury <vbendeb at chromium.org>
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