<p>Vadim Bendebury has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22553">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">apollolake: move TCO1 disable into bootblock<br><br>Cr50 reset processing could take long time, up to 30 s in the worst<br>case. The TCO watchdog needs to be disabled before Cr50 driver starts,<br>let's disable it in bootblock.<br><br>BRANCH=none<br>BUG=b:65867313, b:68729265<br>TEST=verified that resetting the device while keys are being generated<br>     by the TPM does not cause falling into recovery.<br><br>Change-Id: Iaf1f97924590163e45bcac667b6c607503cc8b87<br>Signed-off-by: Vadim Bendebury <vbendeb@chromium.org><br>---<br>M src/soc/intel/apollolake/bootblock/bootblock.c<br>M src/soc/intel/apollolake/romstage.c<br>2 files changed, 8 insertions(+), 11 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/22553/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c<br>index f02d8cf..214d4fd 100644<br>--- a/src/soc/intel/apollolake/bootblock/bootblock.c<br>+++ b/src/soc/intel/apollolake/bootblock/bootblock.c<br>@@ -89,6 +89,8 @@<br> <br> void bootblock_soc_early_init(void)<br> {<br>+        uint32_t reg;<br>+<br>      enable_pmcbar();<br> <br>   /* Clear global reset promotion bit */<br>@@ -109,4 +111,10 @@<br> <br>       /* Initialize GPE for use as interrupt status */<br>      pmc_gpe_init();<br>+<br>+   /* Stop TCO timer */<br>+ reg = inl(ACPI_PMIO_BASE + TCO1_CNT);<br>+        reg |= TCO_TMR_HLT;<br>+  outl(reg, ACPI_PMIO_BASE + TCO1_CNT);<br>+<br> }<br>diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c<br>index f315e61..a003ea0 100644<br>--- a/src/soc/intel/apollolake/romstage.c<br>+++ b/src/soc/intel/apollolake/romstage.c<br>@@ -99,16 +99,6 @@<br>                 lpc_io_setup_comm_a_b();<br> }<br> <br>-static void disable_watchdog(void)<br>-{<br>-     uint32_t reg;<br>-<br>-     /* Stop TCO timer */<br>- reg = inl(ACPI_BASE_ADDRESS + TCO1_CNT);<br>-     reg |= TCO_TMR_HLT;<br>-  outl(reg, ACPI_BASE_ADDRESS + TCO1_CNT);<br>-}<br>-<br> /*<br>  * Punit Initialization code. This all isn't documented, but<br>  * this is the recipe.<br>@@ -202,7 +192,6 @@<br>         timestamp_add_now(TS_START_ROMSTAGE);<br> <br>      soc_early_romstage_init();<br>-   disable_watchdog();<br> <br>        console_init();<br> <br></pre><p>To view, visit <a href="https://review.coreboot.org/22553">change 22553</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22553"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Iaf1f97924590163e45bcac667b6c607503cc8b87 </div>
<div style="display:none"> Gerrit-Change-Number: 22553 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Vadim Bendebury <vbendeb@chromium.org> </div>