[coreboot-gerrit] Change in coreboot[master]: sb/intel: Replace DTS2 with FLVL

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/22513


Change subject: sb/intel: Replace DTS2 with FLVL
......................................................................

sb/intel: Replace DTS2 with FLVL

Replace the unused DTS2 field with FLVL (fan level).
Required to use the fan level on all thinkpads to store and retrieve the
current fan level.
Possible additional use case is to modify the fan level from a SMI handler.

Change-Id: I1ee5348d24b018ab1b61067813c1db63d6706c12
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/southbridge/intel/i82801gx/acpi/globalnvs.asl
M src/southbridge/intel/i82801gx/nvs.h
M src/southbridge/intel/i82801ix/acpi/globalnvs.asl
M src/southbridge/intel/i82801ix/nvs.h
M src/southbridge/intel/i82801jx/acpi/globalnvs.asl
M src/southbridge/intel/i82801jx/nvs.h
6 files changed, 6 insertions(+), 6 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/22513/1

diff --git a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
index 9df2252..33472b6 100644
--- a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
+++ b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl
@@ -57,7 +57,7 @@
 	TCRT,	 8,	// 0x19 - critical trip point
 	DTSE,	 8,	// 0x1a - Digital Thermal Sensor enable
 	DTS1,	 8,	// 0x1b - DT sensor 1
-	DTS2,	 8,	// 0x1c - DT sensor 2
+	FLVL,	 8,	// 0x1c - current fan level
 	/* Battery Support */
 	Offset (0x1e),
 	BNUM,	 8,	// 0x1e - number of batteries
diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h
index decea53..483eddb 100644
--- a/src/southbridge/intel/i82801gx/nvs.h
+++ b/src/southbridge/intel/i82801gx/nvs.h
@@ -42,7 +42,7 @@
 	u8	tcrt; /* 0x19 - critical trip point */
 	u8	dtse; /* 0x1a - Digital Thermal Sensor enable */
 	u8	dts1; /* 0x1b - DT sensor 1 */
-	u8	dts2; /* 0x1c - DT sensor 2 */
+	u8	flvl; /* 0x1c - current fan level */
 	u8	rsvd2;
 	/* Battery Support */
 	u8	bnum; /* 0x1e - number of batteries */
diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
index 97d9fa9..c1be852 100644
--- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
+++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
@@ -58,7 +58,7 @@
 	TCRT,	 8,	// 0x19 - critical trip point
 	DTSE,	 8,	// 0x1a - Digital Thermal Sensor enable
 	DTS1,	 8,	// 0x1b - DT sensor 1
-	DTS2,	 8,	// 0x1c - DT sensor 2
+	FLVL,	 8,	// 0x1c - current fan level
 	/* Battery Support */
 	Offset (0x1e),
 	BNUM,	 8,	// 0x1e - number of batteries
diff --git a/src/southbridge/intel/i82801ix/nvs.h b/src/southbridge/intel/i82801ix/nvs.h
index decea53..483eddb 100644
--- a/src/southbridge/intel/i82801ix/nvs.h
+++ b/src/southbridge/intel/i82801ix/nvs.h
@@ -42,7 +42,7 @@
 	u8	tcrt; /* 0x19 - critical trip point */
 	u8	dtse; /* 0x1a - Digital Thermal Sensor enable */
 	u8	dts1; /* 0x1b - DT sensor 1 */
-	u8	dts2; /* 0x1c - DT sensor 2 */
+	u8	flvl; /* 0x1c - current fan level */
 	u8	rsvd2;
 	/* Battery Support */
 	u8	bnum; /* 0x1e - number of batteries */
diff --git a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl
index df83064..44aa8e4 100644
--- a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl
+++ b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl
@@ -58,7 +58,7 @@
 	CRTT,	 8,	// 0x19 - critical trip point
 	DTSE,	 8,	// 0x1a - Digital Thermal Sensor enable
 	DTS1,	 8,	// 0x1b - DT sensor 1
-	DTS2,	 8,	// 0x1c - DT sensor 2
+	FLVL,	 8,	// 0x1c - current fan level
 	/* Battery Support */
 	Offset (0x1e),
 	BNUM,	 8,	// 0x1e - number of batteries
diff --git a/src/southbridge/intel/i82801jx/nvs.h b/src/southbridge/intel/i82801jx/nvs.h
index c3a3920..16c49bb 100644
--- a/src/southbridge/intel/i82801jx/nvs.h
+++ b/src/southbridge/intel/i82801jx/nvs.h
@@ -42,7 +42,7 @@
 	u8	crtt; /* 0x19 - critical trip point */
 	u8	dtse; /* 0x1a - Digital Thermal Sensor enable */
 	u8	dts1; /* 0x1b - DT sensor 1 */
-	u8	dts2; /* 0x1c - DT sensor 2 */
+	u8	flvl; /* 0x1c - current fan level */
 	u8	rsvd2;
 	/* Battery Support */
 	u8	bnum; /* 0x1e - number of batteries */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1ee5348d24b018ab1b61067813c1db63d6706c12
Gerrit-Change-Number: 22513
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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