<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22513">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel: Replace DTS2 with FLVL<br><br>Replace the unused DTS2 field with FLVL (fan level).<br>Required to use the fan level on all thinkpads to store and retrieve the<br>current fan level.<br>Possible additional use case is to modify the fan level from a SMI handler.<br><br>Change-Id: I1ee5348d24b018ab1b61067813c1db63d6706c12<br>Signed-off-by: Patrick Rudolph <siro@das-labor.org><br>---<br>M src/southbridge/intel/i82801gx/acpi/globalnvs.asl<br>M src/southbridge/intel/i82801gx/nvs.h<br>M src/southbridge/intel/i82801ix/acpi/globalnvs.asl<br>M src/southbridge/intel/i82801ix/nvs.h<br>M src/southbridge/intel/i82801jx/acpi/globalnvs.asl<br>M src/southbridge/intel/i82801jx/nvs.h<br>6 files changed, 6 insertions(+), 6 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/22513/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl<br>index 9df2252..33472b6 100644<br>--- a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl<br>+++ b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl<br>@@ -57,7 +57,7 @@<br>     TCRT,    8,     // 0x19 - critical trip point<br>         DTSE,    8,     // 0x1a - Digital Thermal Sensor enable<br>       DTS1,    8,     // 0x1b - DT sensor 1<br>-        DTS2,    8,     // 0x1c - DT sensor 2<br>+        FLVL,    8,     // 0x1c - current fan level<br>   /* Battery Support */<br>         Offset (0x1e),<br>        BNUM,    8,     // 0x1e - number of batteries<br>diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h<br>index decea53..483eddb 100644<br>--- a/src/southbridge/intel/i82801gx/nvs.h<br>+++ b/src/southbridge/intel/i82801gx/nvs.h<br>@@ -42,7 +42,7 @@<br>     u8      tcrt; /* 0x19 - critical trip point */<br>        u8      dtse; /* 0x1a - Digital Thermal Sensor enable */<br>      u8      dts1; /* 0x1b - DT sensor 1 */<br>-       u8      dts2; /* 0x1c - DT sensor 2 */<br>+       u8      flvl; /* 0x1c - current fan level */<br>  u8      rsvd2;<br>        /* Battery Support */<br>         u8      bnum; /* 0x1e - number of batteries */<br>diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl<br>index 97d9fa9..c1be852 100644<br>--- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl<br>+++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl<br>@@ -58,7 +58,7 @@<br>        TCRT,    8,     // 0x19 - critical trip point<br>         DTSE,    8,     // 0x1a - Digital Thermal Sensor enable<br>       DTS1,    8,     // 0x1b - DT sensor 1<br>-        DTS2,    8,     // 0x1c - DT sensor 2<br>+        FLVL,    8,     // 0x1c - current fan level<br>   /* Battery Support */<br>         Offset (0x1e),<br>        BNUM,    8,     // 0x1e - number of batteries<br>diff --git a/src/southbridge/intel/i82801ix/nvs.h b/src/southbridge/intel/i82801ix/nvs.h<br>index decea53..483eddb 100644<br>--- a/src/southbridge/intel/i82801ix/nvs.h<br>+++ b/src/southbridge/intel/i82801ix/nvs.h<br>@@ -42,7 +42,7 @@<br>     u8      tcrt; /* 0x19 - critical trip point */<br>        u8      dtse; /* 0x1a - Digital Thermal Sensor enable */<br>      u8      dts1; /* 0x1b - DT sensor 1 */<br>-       u8      dts2; /* 0x1c - DT sensor 2 */<br>+       u8      flvl; /* 0x1c - current fan level */<br>  u8      rsvd2;<br>        /* Battery Support */<br>         u8      bnum; /* 0x1e - number of batteries */<br>diff --git a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl<br>index df83064..44aa8e4 100644<br>--- a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl<br>+++ b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl<br>@@ -58,7 +58,7 @@<br>        CRTT,    8,     // 0x19 - critical trip point<br>         DTSE,    8,     // 0x1a - Digital Thermal Sensor enable<br>       DTS1,    8,     // 0x1b - DT sensor 1<br>-        DTS2,    8,     // 0x1c - DT sensor 2<br>+        FLVL,    8,     // 0x1c - current fan level<br>   /* Battery Support */<br>         Offset (0x1e),<br>        BNUM,    8,     // 0x1e - number of batteries<br>diff --git a/src/southbridge/intel/i82801jx/nvs.h b/src/southbridge/intel/i82801jx/nvs.h<br>index c3a3920..16c49bb 100644<br>--- a/src/southbridge/intel/i82801jx/nvs.h<br>+++ b/src/southbridge/intel/i82801jx/nvs.h<br>@@ -42,7 +42,7 @@<br>     u8      crtt; /* 0x19 - critical trip point */<br>        u8      dtse; /* 0x1a - Digital Thermal Sensor enable */<br>      u8      dts1; /* 0x1b - DT sensor 1 */<br>-       u8      dts2; /* 0x1c - DT sensor 2 */<br>+       u8      flvl; /* 0x1c - current fan level */<br>  u8      rsvd2;<br>        /* Battery Support */<br>         u8      bnum; /* 0x1e - number of batteries */<br></pre><p>To view, visit <a href="https://review.coreboot.org/22513">change 22513</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22513"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I1ee5348d24b018ab1b61067813c1db63d6706c12 </div>
<div style="display:none"> Gerrit-Change-Number: 22513 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <siro@das-labor.org> </div>