[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Implement GPIO ACPI AML generating functions

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19828 )

Change subject: soc/intel/skylake: Implement GPIO ACPI AML generating functions
......................................................................

soc/intel/skylake: Implement GPIO ACPI AML generating functions

Implement GPIO ACPI AML generating functions that can be called by
coreboot drivers to generate GPIO manipulation code in AML. Following
API functions are implemented:

1. acpigen_soc_read_rx_gpio
2. acpigen_soc_get_tx_gpio
3. acpigen_soc_set_tx_gpio
4. acpigen_soc_clear_tx_gpio

In addition to the API functions above, helper functions are added to
gpio.asl to set/clear/get Tx value of GPIO.

BUG=b:62028489

Change-Id: I77e5d0decd8929a922d06b02312378f092551667
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/acpi/gpio.asl
2 files changed, 83 insertions(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/19828/1

diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 64438bd..f83bf75 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -695,3 +695,41 @@
 
 	return NULL;
 }
+
+static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)
+{
+	/* op (gpio_num) */
+	acpigen_emit_namestring(op);
+	acpigen_write_integer(gpio_num);
+	return 0;
+}
+
+static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num)
+{
+	/* Store (op (gpio_num), Local0) */
+	acpigen_write_store();
+	acpigen_soc_gpio_op(op, gpio_num);
+	acpigen_emit_byte(LOCAL0_OP);
+
+	return 0;
+}
+
+int acpigen_soc_read_rx_gpio(unsigned int gpio_num)
+{
+	return acpigen_soc_get_gpio_state("\\_SB.PCI0.GRXS", gpio_num);
+}
+
+int acpigen_soc_get_tx_gpio(unsigned int gpio_num)
+{
+	return acpigen_soc_get_gpio_state("\\_SB.PCI0.GTXS", gpio_num);
+}
+
+int acpigen_soc_set_tx_gpio(unsigned int gpio_num)
+{
+	return acpigen_soc_gpio_op("\\_SB.PCI0.STXS", gpio_num);
+}
+
+int acpigen_soc_clear_tx_gpio(unsigned int gpio_num)
+{
+	return acpigen_soc_gpio_op("\\_SB.PCI0.CTXS", gpio_num);
+}
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl
index 0c5a793..fb22095 100644
--- a/src/soc/intel/skylake/acpi/gpio.asl
+++ b/src/soc/intel/skylake/acpi/gpio.asl
@@ -120,7 +120,7 @@
 }
 
 /*
- * Get GPIO Value
+ * Get GPIO Rx Value
  * Arg0 - GPIO Number
  */
 Method (GRXS, 1, Serialized)
@@ -134,3 +134,47 @@
 
 	Return (Local0)
 }
+
+/*
+ * Get GPIO Tx Value
+ * Arg0 - GPIO Number
+ */
+Method (GTXS, 1, Serialized)
+{
+	OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
+	Field (PREG, AnyAcc, NoLock, Preserve)
+	{
+		VAL0, 32
+	}
+	And (GPIOTXSTATE_MASK, ShiftRight (VAL0, GPIOTXSTATE_SHIFT), Local0)
+
+	Return (Local0)
+}
+
+/*
+ * Set GPIO Tx Value
+ * Arg0 - GPIO Number
+ */
+Method (STXS, 1, Serialized)
+{
+	OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
+	Field (PREG, AnyAcc, NoLock, Preserve)
+	{
+		VAL0, 32
+	}
+	Or (GPIOTXSTATE_MASK, VAL0, VAL0)
+}
+
+/*
+ * Clear GPIO Tx Value
+ * Arg0 - GPIO Number
+ */
+Method (CTXS, 1, Serialized)
+{
+	OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
+	Field (PREG, AnyAcc, NoLock, Preserve)
+	{
+		VAL0, 32
+	}
+	And (Not (GPIOTXSTATE_MASK), VAL0, VAL0)
+}

-- 
To view, visit https://review.coreboot.org/19828
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I77e5d0decd8929a922d06b02312378f092551667
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>