[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Enable PARALLEL_MP_AP_WORK

[Furquan Shaikh (Code Review)]

Hello Aaron Durbin, Philippe Mathieu-Daudé, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

    https://review.coreboot.org/19608

to look at the new patch set (#2).

Change subject: soc/intel/skylake: Enable PARALLEL_MP_AP_WORK
......................................................................

soc/intel/skylake: Enable PARALLEL_MP_AP_WORK

With change a4b11e5c90 (soc/intel/skylake: Perform CPU MP Init
before FSP-S Init) to perform CPU MP init before FSP-S init, MTRR
programming was moved to be performed after CPU init is done. However,
in order to allow callbacks after MP init, PARALLEL_MP_AP_WORK needs
to be enabled. Since this option was not selected, MTRR programming
always failed in ramstage for Skylake / Kaby Lake mainboards.

BUG=b:36656098
TEST=Verified 2500+ cycles of suspend resume on poppy.

Change-Id: I22a8f6ac90ba35075ff97dd57bab66c129f3e771
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
M src/soc/intel/skylake/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/19608/2
-- 
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I22a8f6ac90ba35075ff97dd57bab66c129f3e771
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude at gmail.com>
Gerrit-Reviewer: Rajat Jain <rajatja at google.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>