[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Use common/block/uart code

Martin Roth (Code Review) gerrit at coreboot.org
Tue May 9 17:58:44 CEST 2017


Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19491 )

Change subject: soc/intel/apollolake: Use common/block/uart code
......................................................................


soc/intel/apollolake: Use common/block/uart code

Change-Id: I92c654d59f1642bcd7c95de80dcc641bf816b542
Signed-off-by: Aamir Bohra <aamir.bohra at intel.com>
Reviewed-on: https://review.coreboot.org/19491
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
M src/soc/intel/apollolake/include/soc/pci_ids.h
M src/soc/intel/apollolake/uart.c
2 files changed, 2 insertions(+), 28 deletions(-)

Approvals:
  Aaron Durbin: Looks good to me, approved
  build bot (Jenkins): Verified



diff --git a/src/soc/intel/apollolake/include/soc/pci_ids.h b/src/soc/intel/apollolake/include/soc/pci_ids.h
index 8e1ac9f..25e7f94 100644
--- a/src/soc/intel/apollolake/include/soc/pci_ids.h
+++ b/src/soc/intel/apollolake/include/soc/pci_ids.h
@@ -35,10 +35,6 @@
 #define PCI_DEVICE_ID_APOLLOLAKE_I2C5		0x5ab6		/* 00:17.1 */
 #define PCI_DEVICE_ID_APOLLOLAKE_I2C6		0x5ab8		/* 00:17.2 */
 #define PCI_DEVICE_ID_APOLLOLAKE_I2C7		0x5aba		/* 00:17.3 */
-#define PCI_DEVICE_ID_APOLLOLAKE_UART0		0x5abc		/* 00:18.0 */
-#define PCI_DEVICE_ID_APOLLOLAKE_UART1		0x5abe		/* 00:18.1 */
-#define PCI_DEVICE_ID_APOLLOLAKE_UART2		0x5ac0		/* 00:18.2 */
-#define PCI_DEVICE_ID_APOLLOLAKE_UART3		0x5aee		/* 00:18.3 */
 #define PCI_DEVICE_ID_APOLLOLAKE_SPI0		0x5ac2		/* 00:19.0 */
 #define PCI_DEVICE_ID_APOLLOLAKE_SPI1		0x5ac4		/* 00:19.1 */
 #define PCI_DEVICE_ID_APOLLOLAKE_SPI2		0x5ac6		/* 00:19.2 */
diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c
index 70d034f..3db460a 100644
--- a/src/soc/intel/apollolake/uart.c
+++ b/src/soc/intel/apollolake/uart.c
@@ -20,14 +20,12 @@
  * shouldn't cause any fragmentation.
  */
 
-#include <console/uart.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/pci_ids.h>
-#include <soc/pci_ids.h>
+#include <intelblocks/uart.h>
 #include <soc/pci_devs.h>
 
-static void aplk_uart_read_resources(struct device *dev)
+void pch_uart_read_resources(struct device *dev)
 {
 	pci_dev_read_resources(dev);
 
@@ -39,23 +37,3 @@
 				CONFIG_CONSOLE_UART_BASE_ADDRESS >> 10, 4, 0);
 	}
 }
-
-static struct device_operations uart_ops = {
-	.read_resources   = aplk_uart_read_resources,
-	.set_resources    = pci_dev_set_resources,
-	.enable_resources = pci_dev_enable_resources,
-	.init             = pci_dev_init,
-	.enable           = DEVICE_NOOP
-};
-
-static const unsigned short uart_ids[] = {
-	PCI_DEVICE_ID_APOLLOLAKE_UART0, PCI_DEVICE_ID_APOLLOLAKE_UART1,
-	PCI_DEVICE_ID_APOLLOLAKE_UART2, PCI_DEVICE_ID_APOLLOLAKE_UART3,
-	0
-};
-
-static const struct pci_driver uart_driver __pci_driver = {
-	.ops     = &uart_ops,
-	.vendor  = PCI_VENDOR_ID_INTEL,
-	.devices = uart_ids
-};

-- 
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Gerrit-MessageType: merged
Gerrit-Change-Id: I92c654d59f1642bcd7c95de80dcc641bf816b542
Gerrit-PatchSet: 8
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>



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