[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy: Add eMMC as thermal sensor

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has uploaded a new change for review. ( https://review.coreboot.org/19524 )

Change subject: mb/google/poppy: Add eMMC as thermal sensor
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mb/google/poppy: Add eMMC as thermal sensor

This patch adds the eMMC as one of the thermal sensor under DPTF.
Also, updates few comments for better interpretation and mapping.

BUG=None
BRANCH=None
TEST=Built for poppy.

Change-Id: I6d05bb7a2f857dc5bc98227c8327b2ff1bd5b913
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
---
M src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/dptf.asl
1 file changed, 12 insertions(+), 4 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/19524/1

diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/dptf.asl
index 7f6cd8e..cbe4b7a 100644
--- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/dptf.asl
+++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/dptf.asl
@@ -32,6 +32,11 @@
 #define DPTF_TSR2_PASSIVE	52
 #define DPTF_TSR2_CRITICAL	75
 
+#define DPTF_TSR3_SENSOR_ID	4
+#define DPTF_TSR3_SENSOR_NAME	"eMMC"
+#define DPTF_TSR3_PASSIVE	55
+#define DPTF_TSR3_CRITICAL	75
+
 #define DPTF_ENABLE_CHARGER
 
 /* Charger performance states, board-specific values from charger and EC */
@@ -46,16 +51,19 @@
 	/* CPU Throttle Effect on CPU */
 	Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 },
 
-	/* CPU Effect on Temp Sensor 0 */
+	/* CPU Throttle Effect on Ambient (TSR0) */
 	Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
 
 #ifdef DPTF_ENABLE_CHARGER
-	/* Charger Effect on Temp Sensor 1 */
-	Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 },
+	/* Charger Throttle Effect on Charger (TSR1) */
+	Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
 #endif
 
-	/* CPU Effect on Temp Sensor 2 */
+	/* CPU Throttle Effect on DRAM (TSR2) */
 	Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 90, 0, 0, 0, 0 },
+
+	/* CPU Throttle Effect on eMMC (TSR3) */
+	Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR3, 100, 600, 0, 0, 0, 0 },
 })
 
 Name (MPPC, Package ()

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I6d05bb7a2f857dc5bc98227c8327b2ff1bd5b913
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>