[coreboot-gerrit] Change in coreboot[master]: common/block/cse: Use CSE PCH ID from device/pci_ids.h

[Martin Roth (Code Review)]

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19569 )

Change subject: common/block/cse: Use CSE PCH ID from device/pci_ids.h
......................................................................


common/block/cse: Use CSE PCH ID from device/pci_ids.h

Change-Id: Ic92d17b2819c39997bbffff8293c937f3f73776b
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
Reviewed-on: https://review.coreboot.org/19569
Tested-by: build bot (Jenkins) <no-reply at coreboot.org>
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
M src/soc/intel/apollolake/include/soc/pci_ids.h
M src/soc/intel/common/block/cse/cse.c
2 files changed, 1 insertion(+), 3 deletions(-)

Approvals:
  Aaron Durbin: Looks good to me, approved
  build bot (Jenkins): Verified



diff --git a/src/soc/intel/apollolake/include/soc/pci_ids.h b/src/soc/intel/apollolake/include/soc/pci_ids.h
index 8b548ee..4c2956f 100644
--- a/src/soc/intel/apollolake/include/soc/pci_ids.h
+++ b/src/soc/intel/apollolake/include/soc/pci_ids.h
@@ -26,8 +26,6 @@
 #define PCI_DEVICE_ID_APOLLOLAKE_HWSEQ_SPI	0x5a96		/* 00:0d.2 */
 #define PCI_DEVICE_ID_APOLLOLAKE_SRAM		0x5aec		/* 00:0d.3 */
 #define PCI_DEVICE_ID_APOLLOLAKE_AUDIO		0x5a98		/* 00:0e.0 */
-#define PCI_DEVICE_ID_APOLLOLAKE_CSE0		0x5a9a		/* 00:0f.0 */
-#define PCI_DEVICE_ID_HECI1			PCI_DEVICE_ID_APOLLOLAKE_CSE0
 #define PCI_DEVICE_ID_APOLLOLAKE_SATA		0x5ae0		/* 00:12.0 */
 #define PCI_DEVICE_ID_APOLLOLAKE_XHCI		0x5aa8		/* 00:15.0 */
 #define PCI_DEVICE_ID_APOLLOLAKE_XDCI		0x5aaa		/* 00:15.1 */
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 64a20d8..272fe7a 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -471,7 +471,7 @@
 	.ops			= &cse_ops,
 	.vendor			= PCI_VENDOR_ID_INTEL,
 	/* SoC/chipset needs to provide PCI device ID */
-	.device			= PCI_DEVICE_ID_HECI1
+	.device			= PCI_DEVICE_ID_INTEL_APOLLOLAKE_CSE0
 };
 
 #endif

-- 
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Gerrit-MessageType: merged
Gerrit-Change-Id: Ic92d17b2819c39997bbffff8293c937f3f73776b
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>