[coreboot-gerrit] Change in coreboot[master]: sb/intel/bd82x6x/finalize: Lock ETR3 CF9GR

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/19543 )

Change subject: sb/intel/bd82x6x/finalize: Lock ETR3 CF9GR
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Patch Set 1:

It's already done on some boards in pch_enable_lpc().
I'll clean the mainboards dir in a seperate commit, as it's to early to lock the reset function in early romstage.

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Gerrit-MessageType: comment
Gerrit-Change-Id: I2cb30267a6342db1f3b11715034219ffb18ca678
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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