[coreboot-gerrit] Change in coreboot[master]: DO NOT MERGE: apollolake: Add ramstage eMMC testing

[Lee Leahy (Code Review)]

Lee Leahy has uploaded a new change for review. ( https://review.coreboot.org/19020 )

Change subject: DO NOT MERGE: apollolake: Add ramstage eMMC testing
......................................................................

DO NOT MERGE: apollolake: Add ramstage eMMC testing

Change-Id: I0a9ca1fe990897400cc5921146d83581c218af54
---
M src/soc/intel/apollolake/Makefile.inc
A src/soc/intel/apollolake/emmc.c
M src/soc/intel/apollolake/include/soc/pci_ids.h
3 files changed, 75 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/19020/1

diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 411bf58..cd25d86 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -86,6 +86,7 @@
 ramstage-y += xdci.c
 ramstage-y += xhci.c
 ramstage-y += sd.c
+ramstage-y += emmc.c
 
 postcar-y += flash_ctrlr.c
 postcar-y += memmap.c
diff --git a/src/soc/intel/apollolake/emmc.c b/src/soc/intel/apollolake/emmc.c
new file mode 100644
index 0000000..ca71a7f
--- /dev/null
+++ b/src/soc/intel/apollolake/emmc.c
@@ -0,0 +1,73 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/sdhci.h>
+#include <lib.h>
+#include <soc/pci_ids.h>
+
+static void emmc_init(struct device *dev)
+{
+	uint32_t bar;
+	lba_t blocks_read;
+	uint8_t buffer[512];
+	uint16_t command;
+	int err;
+	SdhciHost host;
+
+	/* Get the temporary base address */
+	bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
+	bar &= ~0xf;
+
+	/* Enable the eMMC controller */
+	command = pci_read_config16(dev, PCI_COMMAND);
+	command |= PCI_COMMAND_MEMORY;
+	pci_write_config16(dev, PCI_COMMAND, command);
+
+	/* Initialize the eMMC device */
+	printk(BIOS_DEBUG, "Initializing the SDHC/eMMC\n");
+	err = sdhci_host_init(&host, (void *)bar,
+		SDHCI_PLATFORM_EMMC_1V8_POWER | SDHCI_PLATFORM_SUPPORTS_HS400ES,
+		0, 0, 0);
+	if (err) {
+		printk(BIOS_ERR,
+			"ERROR - eMMC failed to initialize, err = %d\n",
+			err);
+		return;
+	}
+
+	/* Read block 0 */
+	printk(BIOS_DEBUG, "Reading block 0\n" );
+	blocks_read = block_mmc_read(host.mmc_ctrlr.media, 0, 1, &buffer);
+	if (blocks_read)
+		hexdump(buffer, sizeof(buffer));
+}
+
+static const struct device_operations device_ops = {
+	.read_resources		= pci_dev_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_dev_enable_resources,
+	.init			= emmc_init,
+};
+
+static const struct pci_driver pmc __pci_driver = {
+	.ops	= &device_ops,
+	.vendor	= PCI_VENDOR_ID_INTEL,
+	.device	= PCI_DEVICE_ID_APOLLOLAKE_EMMC,
+};
diff --git a/src/soc/intel/apollolake/include/soc/pci_ids.h b/src/soc/intel/apollolake/include/soc/pci_ids.h
index 8b548ee..ba2c957 100644
--- a/src/soc/intel/apollolake/include/soc/pci_ids.h
+++ b/src/soc/intel/apollolake/include/soc/pci_ids.h
@@ -46,6 +46,7 @@
 #define PCI_DEVICE_ID_APOLLOLAKE_SPI0		0x5ac2		/* 00:19.0 */
 #define PCI_DEVICE_ID_APOLLOLAKE_SPI1		0x5ac4		/* 00:19.1 */
 #define PCI_DEVICE_ID_APOLLOLAKE_SPI2		0x5ac6		/* 00:19.2 */
+#define PCI_DEVICE_ID_APOLLOLAKE_EMMC		0x5acc		/* 00:1c.0 */
 #define PCI_DEVICE_ID_APOLLOLAKE_LPC		0x5ae8		/* 00:1f.0 */
 
 #endif /* _SOC_APOLLOLAKE_PCI_IDS_H_ */

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I0a9ca1fe990897400cc5921146d83581c218af54
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Lee Leahy <leroy.p.leahy at intel.com>