[coreboot-gerrit] Change in coreboot[master]: driver/intel/mipi_camera: Add MIPI CSI camera SSDT generator

V Sowmya (Code Review) gerrit at coreboot.org
Fri Mar 24 12:11:45 CET 2017


Hello Rizwan Qureshi,

I'd like you to do a code review.  Please visit

    https://review.coreboot.org/18967

to review the following change.


Change subject: driver/intel/mipi_camera: Add MIPI CSI camera SSDT generator
......................................................................

driver/intel/mipi_camera: Add MIPI CSI camera SSDT generator

Add SSDT generator for MIPI CSI camera which will generate required
SSDB and CLDB structures for device specific data and PWDB structure
for power sequencing data which are used by the Intel kernel drivers.
* SSDB: Sensor specific database for camera sensor.
* CLDB: Control logic database for camera PMIC.
* PWDB: Power database for all the camera devices.
* CAMD: ACPI object to specify the camera device type.

BUG=b:36580624
BRANCH=none
TEST=Build and boot poppy. Dump and verify that the generated SSDT table
has the required entries.

Change-Id: Ief9e56d12b64081897613bf1c7abcdf915470b99
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
Signed-off-by: Sowmya V <v.sowmya at intel.com>
---
A src/drivers/intel/mipi_camera/Kconfig
A src/drivers/intel/mipi_camera/Makefile.inc
A src/drivers/intel/mipi_camera/camera.c
A src/drivers/intel/mipi_camera/chip.h
4 files changed, 218 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/18967/1

diff --git a/src/drivers/intel/mipi_camera/Kconfig b/src/drivers/intel/mipi_camera/Kconfig
new file mode 100644
index 0000000..74b9840
--- /dev/null
+++ b/src/drivers/intel/mipi_camera/Kconfig
@@ -0,0 +1,6 @@
+config DRIVERS_INTEL_MIPI_CAMERA
+	bool
+	default n
+	help
+	  MIPI CSI I2C camera SSDT generator. Generates SSDB, CLDB and
+	  PWDB structures which are used by the Intel kernel drivers.
diff --git a/src/drivers/intel/mipi_camera/Makefile.inc b/src/drivers/intel/mipi_camera/Makefile.inc
new file mode 100644
index 0000000..85f67b2
--- /dev/null
+++ b/src/drivers/intel/mipi_camera/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_DRIVERS_INTEL_MIPI_CAMERA) += camera.c
diff --git a/src/drivers/intel/mipi_camera/camera.c b/src/drivers/intel/mipi_camera/camera.c
new file mode 100644
index 0000000..2132282
--- /dev/null
+++ b/src/drivers/intel/mipi_camera/camera.c
@@ -0,0 +1,110 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <arch/acpi_device.h>
+#include <arch/acpigen.h>
+#include <console/console.h>
+#include <device/i2c.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <stdint.h>
+#include <string.h>
+#include "chip.h"
+
+#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+
+static void camera_fill_ssdt(struct device *dev)
+{
+	struct drivers_intel_mipi_camera_config *config = dev->chip_info;
+	const char *scope = acpi_device_scope(dev);
+	struct acpi_i2c i2c = {
+		.address = dev->path.i2c.device,
+		.mode_10bit = dev->path.i2c.mode_10bit,
+		.speed = I2C_SPEED_FAST,
+		.resource = scope,
+	};
+
+	if (!dev->enabled || !scope)
+		return;
+
+	/* Device */
+	acpigen_write_scope(scope);
+	acpigen_write_device(acpi_device_name(dev));
+	acpigen_write_name_string("_HID", config->acpi_hid);
+	acpigen_write_name_integer("_UID", config->acpi_uid);
+	acpigen_write_name_string("_DDN", config->chip_name);
+	acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);
+
+	/* Resources */
+	acpigen_write_name("_CRS");
+	acpigen_write_resourcetemplate_header();
+	acpi_device_write_i2c(&i2c);
+	acpigen_write_resourcetemplate_footer();
+
+	/* Mark it as Camera related device */
+	acpigen_write_name_integer("CAMD", config->device_type);
+
+	/* Create Device specific data */
+	if (config->device_type == INTEL_ACPI_CAMERA_SENSOR){
+		acpigen_write_method_serialized("SSDB",0);
+		acpigen_write_return_byte_buffer((uint8_t *)&config->ssdb,
+						sizeof(config->ssdb));
+		acpigen_pop_len(); /* Method */
+	} else if (config->device_type == INTEL_ACPI_CAMERA_PMIC){
+		acpigen_write_method_serialized("CLDB",0);
+		acpigen_write_return_byte_buffer((uint8_t *)&config->cldb,
+						sizeof(config->cldb));
+		acpigen_pop_len(); /* Method */
+	}
+
+	/* Fill Power Sequencing Data */
+	acpigen_write_method_serialized("PWDB",0);
+	acpigen_write_return_byte_buffer((uint8_t *)&config->pwdb,
+			(sizeof(intel_pwdb) * config->num_pwdb_entries));
+	acpigen_pop_len(); /* Method */
+
+	acpigen_pop_len(); /* Device */
+	acpigen_pop_len(); /* Scope */
+	printk(BIOS_INFO, "%s: %s address 0%xh\n", acpi_device_path(dev),
+			dev->chip_ops->name, dev->path.i2c.device);
+}
+
+static const char *camera_acpi_name(struct device *dev)
+{
+	struct drivers_intel_mipi_camera_config *config = dev->chip_info;
+	return config->acpi_name;
+}
+#endif
+
+static struct device_operations camera_ops = {
+	.read_resources           = DEVICE_NOOP,
+	.set_resources            = DEVICE_NOOP,
+	.enable_resources         = DEVICE_NOOP,
+#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+	.acpi_name                = &camera_acpi_name,
+	.acpi_fill_ssdt_generator = &camera_fill_ssdt,
+#endif
+};
+
+static void camera_enable(struct device *dev)
+{
+	dev->ops = &camera_ops;
+}
+
+struct chip_operations drivers_intel_mipi_camera_ops = {
+	CHIP_NAME("Intel Camera Device")
+	.enable_dev = &camera_enable
+};
diff --git a/src/drivers/intel/mipi_camera/chip.h b/src/drivers/intel/mipi_camera/chip.h
new file mode 100644
index 0000000..a673045
--- /dev/null
+++ b/src/drivers/intel/mipi_camera/chip.h
@@ -0,0 +1,101 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __INTEL_MIPI_CAMERA_CHIP_H__
+#define __INTEL_MIPI_CAMERA_CHIP_H__
+
+#include <arch/acpi_device.h>
+
+#define MAX_PWDB_ENTRIES 12
+
+typedef enum {
+	INTEL_ACPI_CAMERA_CIO2=0,
+	INTEL_ACPI_CAMERA_IMGU,
+	INTEL_ACPI_CAMERA_SENSOR,
+	INTEL_ACPI_CAMERA_VCM,
+	INTEL_ACPI_CAMERA_PMIC=100,
+} intel_camera_device_type;
+
+typedef enum {
+	INTEL_ACPI_CAMERA_REGULATOR=0,
+	INTEL_ACPI_CAMERA_CLK,
+	INTEL_ACPI_CAMERA_GPIO,
+} intel_power_action_type;
+
+typedef struct {
+	uint8_t version;
+	uint8_t sensor_card_sku;
+	uint8_t csi2_data_stream_interface[16];
+	uint16_t bdf_value;
+	uint32_t dphy_link_en_fuses;
+	uint32_t lanes_clock_division;
+	uint8_t link_used;
+	uint8_t lanes_used;
+	uint32_t csi_rx_dly_cnt_termen_clane;
+	uint32_t csi_rx_dly_cnt_settle_clane;
+	uint32_t csi_rx_dly_cnt_termen_dlane0;
+	uint32_t csi_rx_dly_cnt_settle_dlane0;
+	uint32_t csi_rx_dly_cnt_termen_dlane1;
+	uint32_t csi_rx_dly_cnt_settle_dlane1;
+	uint32_t csi_rx_dly_cnt_termen_dlane2;
+	uint32_t csi_rx_dly_cnt_settle_dlane2;
+	uint32_t csi_rx_dly_cnt_termen_dlane3;
+	uint32_t csi_rx_dly_cnt_settle_dlane3;
+	uint32_t max_lane_speed;
+	uint8_t sensor_calibration_file_index;
+	uint8_t sensor_calibration_file_index_mbz[3];
+	uint8_t rom_type;
+	uint8_t vcm_type;
+	uint8_t platform;
+	uint8_t platform_sub;
+	uint8_t flash_support;
+	uint8_t privacy_led;
+	uint8_t degree;
+	uint8_t mipi_define;
+	uint32_t mclk;
+	uint8_t control_logic_id;
+	uint8_t mipi_data_format;
+	uint8_t silicon_version;
+	uint8_t customer_id;
+} __attribute__((packed))intel_ssdb;
+
+typedef struct {
+	uint8_t version;
+	uint8_t control_logic_type;
+	uint8_t control_logic_id;
+	uint8_t sensor_card_sku;
+	uint8_t reserved[28];
+} __attribute__((packed))intel_cldb;
+
+typedef struct {
+	char name[32];
+	uint32_t value;
+	intel_power_action_type entry_type;
+	uint32_t delay;
+} __attribute__((packed))intel_pwdb;
+
+struct drivers_intel_mipi_camera_config {
+	intel_ssdb ssdb;
+	intel_cldb cldb;
+	intel_pwdb pwdb[MAX_PWDB_ENTRIES];
+	intel_camera_device_type device_type;
+	uint8_t num_pwdb_entries;
+	const char acpi_hid[9];
+	const char acpi_name[5];
+	const char chip_name[16];
+	uint64_t acpi_uid;
+};
+
+#endif

-- 
To view, visit https://review.coreboot.org/18967
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Ief9e56d12b64081897613bf1c7abcdf915470b99
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: V Sowmya <v.sowmya at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Naresh Solanki <naresh.solanki at intel.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>



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