[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block: Add cache as ram init and teardown code

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/18381 )

Change subject: soc/intel/common/block: Add cache as ram init and teardown code
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Patch Set 33:

(2 comments)

https://review.coreboot.org/#/c/18381/33/src/soc/intel/skylake/Kconfig
File src/soc/intel/skylake/Kconfig:

PS33, Line 188: config SOC_INTEL_COMMON_BLOCK_CAR
              : 	bool
              : 	default y if !FSP_CAR
              : 	select INTEL_CAR_NEM_ENHANCED
> mistake, will remove this
Done


Line 279: 	  kept in cache while clean data is replaced.
> Same comment as apl one where you don't need the Kconfig at line 188 if you
Done


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Gerrit-MessageType: comment
Gerrit-Change-Id: Iffd0c3e3ca81a3d283d5f1da115222a222e6b157
Gerrit-PatchSet: 33
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
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Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
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