[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Create API to read SPI Flash MMIO register

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/18921 )

Change subject: soc/intel/skylake: Create API to read SPI Flash MMIO register
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Patch Set 3:

(3 comments)

https://review.coreboot.org/#/c/18921/3//COMMIT_MSG
Commit Message:

PS3, Line 7: SPI Flash
> Can we find a better name for this? I thought about `SPI controller`.
Yes, it should be SPI CTRL MMIO register space which is getting accessed through BAR+Offset.


https://review.coreboot.org/#/c/18921/3/src/soc/intel/skylake/include/soc/spi.h
File src/soc/intel/skylake/include/soc/spi.h:

PS3, Line 81: #define SPIBAR_BFPREG		0x00
            : #define  SPIBAR_BFPREG_PRB_MASK	(0x7fff)
            : #define  SPIBAR_BFPREG_PRL_SHIFT	(16)
            : #define  SPIBAR_BFPREG_PRL_MASK	(0x7fff << SPIBAR_BFPREG_PRL_SHIFT)
            : #define  SPIBAR_BFPREG_SBRS		(1 << 31)
> Did you mean to put these registers in the follow-up CL?
i didn't get your review comment correctly but in order to get BIOS region size in follow-up patch, we need to use this register. Also in process to make common code between Big and small core, i have seen these are complete set of register that small core uses while big core earlier depends on Kconfig to decide CAR size.


PS3, Line 85: #define  SPIBAR_BFPREG_SBRS		(1 << 31)
> This is marked reserved in the version of EDS I have.
I could see some discrepancy here then. This bit is not reserved for sure but its RO. Can you please check if you have latest EDS with you.

Bit 31: Shadowed BIOS Region Select (SBRS): This bit reflects the
MEFCTRL.BRS bit under the CSME SPI CSME root space configuration
register.


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Gerrit-MessageType: comment
Gerrit-Change-Id: I43400aa7204c27c73fd70e93027005d19def56ac
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
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Gerrit-Reviewer: Pratikkumar Prajapati <pratikkumar.v.prajapati at intel.corp-partner.google.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
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Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma at intel.com>
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