[coreboot-gerrit] Change in coreboot[master]: arch/x86: Fix issues with braces detected by checkpatch
Lee Leahy (Code Review)
gerrit at coreboot.org
Fri Mar 17 03:13:11 CET 2017
Lee Leahy has submitted this change and it was merged. ( https://review.coreboot.org/18861 )
Change subject: arch/x86: Fix issues with braces detected by checkpatch
......................................................................
arch/x86: Fix issues with braces detected by checkpatch
Fix the following errors and warnings detected by checkpatch.pl:
ERROR: open brace '{' following function declarations go on the next line
ERROR: that open brace { should be on the previous line
ERROR: else should follow close brace '}'
WARNING: braces {} are not necessary for any arm of this statement
WARNING: braces {} are not necessary for single statement blocks
TEST=Build and run on Galileo Gen2
Change-Id: I13d1967757e106c8300a15baed25d920c52a1a95
Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
Reviewed-on: https://review.coreboot.org/18861
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
M src/arch/x86/acpi.c
M src/arch/x86/acpigen.c
M src/arch/x86/bootblock_normal.c
M src/arch/x86/cpu.c
M src/arch/x86/exception.c
M src/arch/x86/include/arch/bootblock_romcc.h
M src/arch/x86/include/arch/io.h
M src/arch/x86/include/arch/smp/mpspec.h
M src/arch/x86/mpspec.c
M src/arch/x86/pirq_routing.c
M src/arch/x86/smbios.c
M src/arch/x86/tables.c
12 files changed, 66 insertions(+), 102 deletions(-)
Approvals:
Aaron Durbin: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
index 703bfa1..4109ec4 100644
--- a/src/arch/x86/acpi.c
+++ b/src/arch/x86/acpi.c
@@ -287,9 +287,8 @@
memset((void *)tcpa, 0, sizeof(acpi_tcpa_t));
lasa = get_tcpa_log(&tcpa_log_len);
- if (!lasa) {
+ if (!lasa)
return;
- }
/* Fill out header fields. */
memcpy(header->signature, "TCPA", 4);
@@ -354,9 +353,8 @@
{
struct device *dev;
for (dev = all_devices; dev; dev = dev->next)
- if (dev->ops && dev->ops->acpi_fill_ssdt_generator) {
+ if (dev->ops && dev->ops->acpi_fill_ssdt_generator)
dev->ops->acpi_fill_ssdt_generator(dev);
- }
current = (unsigned long) acpigen_get_current();
}
@@ -840,11 +838,10 @@
fadt->x_dsdt_l = (unsigned long)dsdt;
fadt->x_dsdt_h = 0;
- if (IS_ENABLED(CONFIG_SYSTEM_TYPE_LAPTOP)) {
+ if (IS_ENABLED(CONFIG_SYSTEM_TYPE_LAPTOP))
fadt->preferred_pm_profile = PM_MOBILE;
- } else {
+ else
fadt->preferred_pm_profile = PM_DESKTOP;
- }
acpi_fill_fadt(fadt);
@@ -953,9 +950,8 @@
acpigen_set_current((char *) current);
for (dev = all_devices; dev; dev = dev->next)
- if (dev->ops && dev->ops->acpi_inject_dsdt_generator) {
+ if (dev->ops && dev->ops->acpi_inject_dsdt_generator)
dev->ops->acpi_inject_dsdt_generator(dev);
- }
current = (unsigned long) acpigen_get_current();
memcpy((char *)current,
(char *)dsdt_file + sizeof(acpi_header_t),
diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c
index d3ec05f..7e4775c 100644
--- a/src/arch/x86/acpigen.c
+++ b/src/arch/x86/acpigen.c
@@ -204,9 +204,8 @@
void acpigen_emit_stream(const char *data, int size)
{
int i;
- for (i = 0; i < size; i++) {
+ for (i = 0; i < size; i++)
acpigen_emit_byte(data[i]);
- }
}
void acpigen_emit_string(const char *string)
@@ -238,7 +237,8 @@
* Check sections 5.3, 18.2.2 and 18.4 of ACPI spec 3.0 for details.
*/
-static void acpigen_emit_simple_namestring(const char *name) {
+static void acpigen_emit_simple_namestring(const char *name)
+{
int i;
char ud[] = "____";
for (i = 0; i < 4; i++) {
@@ -251,13 +251,15 @@
}
}
-static void acpigen_emit_double_namestring(const char *name, int dotpos) {
+static void acpigen_emit_double_namestring(const char *name, int dotpos)
+{
acpigen_emit_byte(DUAL_NAME_PREFIX);
acpigen_emit_simple_namestring(name);
acpigen_emit_simple_namestring(&name[dotpos + 1]);
}
-static void acpigen_emit_multi_namestring(const char *name) {
+static void acpigen_emit_multi_namestring(const char *name)
+{
int count = 0;
unsigned char *pathlen;
acpigen_emit_byte(MULTI_NAME_PREFIX);
@@ -279,7 +281,8 @@
}
-void acpigen_emit_namestring(const char *namepath) {
+void acpigen_emit_namestring(const char *namepath)
+{
int dotcount = 0, i;
int dotpos = 0;
@@ -311,13 +314,12 @@
i++;
}
- if (dotcount == 0) {
+ if (dotcount == 0)
acpigen_emit_simple_namestring(namepath);
- } else if (dotcount == 1) {
+ else if (dotcount == 1)
acpigen_emit_double_namestring(namepath, dotpos);
- } else {
+ else
acpigen_emit_multi_namestring(namepath);
- }
}
void acpigen_write_name(const char *name)
diff --git a/src/arch/x86/bootblock_normal.c b/src/arch/x86/bootblock_normal.c
index d6aa79a..43d26c9 100644
--- a/src/arch/x86/bootblock_normal.c
+++ b/src/arch/x86/bootblock_normal.c
@@ -16,7 +16,8 @@
#include <pc80/mc146818rtc.h>
#include <halt.h>
-static const char *get_fallback(const char *stagelist) {
+static const char *get_fallback(const char *stagelist)
+{
while (*stagelist) stagelist++;
return ++stagelist;
}
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c
index 1e74d0c..e53390f 100644
--- a/src/arch/x86/cpu.c
+++ b/src/arch/x86/cpu.c
@@ -137,9 +137,7 @@
name = "<invalid CPU vendor>";
if ((vendor < (ARRAY_SIZE(x86_vendor_name))) &&
(x86_vendor_name[vendor] != 0))
- {
name = x86_vendor_name[vendor];
- }
return name;
}
@@ -154,19 +152,16 @@
/* Find the id and vendor_name */
if (!cpu_have_cpuid()) {
/* Its a 486 if we can modify the AC flag */
- if (flag_is_changeable_p(X86_EFLAGS_AC)) {
+ if (flag_is_changeable_p(X86_EFLAGS_AC))
cpu->device = 0x00000400; /* 486 */
- } else {
+ else
cpu->device = 0x00000300; /* 386 */
- }
- if ((cpu->device == 0x00000400) && test_cyrix_52div()) {
+ if ((cpu->device == 0x00000400) && test_cyrix_52div())
memcpy(vendor_name, "CyrixInstead", 13);
/* If we ever care we can enable cpuid here */
- }
/* Detect NexGen with old hypercode */
- else if (deep_magic_nexgen_probe()) {
+ else if (deep_magic_nexgen_probe())
memcpy(vendor_name, "NexGenDriven", 13);
- }
}
#endif
if (cpu_have_cpuid()) {
@@ -189,13 +184,11 @@
vendor_name[12] = '\0';
/* Intel-defined flags: level 0x00000001 */
- if (cpuid_level >= 0x00000001) {
+ if (cpuid_level >= 0x00000001)
cpu->device = cpuid_eax(0x00000001);
- }
- else {
+ else
/* Have CPUID level 0 only unheard of */
cpu->device = 0x00000400;
- }
}
cpu->vendor = X86_VENDOR_UNKNOWN;
for (i = 0; i < ARRAY_SIZE(x86_vendors); i++) {
@@ -215,9 +208,7 @@
id->vendor != X86_VENDOR_INVALID; id++) {
if ((cpu->vendor == id->vendor) &&
(cpu->device == id->device))
- {
return driver;
- }
if (X86_VENDOR_ANY == id->vendor)
return driver;
}
@@ -247,9 +238,8 @@
printk(BIOS_INFO, "Initializing CPU #%d\n", index);
cpu = info->cpu;
- if (!cpu) {
+ if (!cpu)
die("CPU: missing CPU device structure");
- }
if (cpu->initialized)
return;
diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c
index 84328be..1d83a00 100644
--- a/src/arch/x86/exception.c
+++ b/src/arch/x86/exception.c
@@ -187,8 +187,7 @@
-static unsigned char exception_to_signal[] =
-{
+static unsigned char exception_to_signal[] = {
[0] = GDB_SIGFPE, /* divide by zero */
[1] = GDB_SIGTRAP, /* debug exception */
[2] = GDB_SIGSEGV, /* NMI Interrupt */
@@ -342,8 +341,7 @@
if (checksum != xmitcsum) {
stub_putc('-'); /* failed checksum */
stub_flush();
- }
- else {
+ } else {
stub_putc('+'); /* successful transfer */
stub_flush();
}
@@ -394,9 +392,8 @@
gdb_stub_registers[CS] = info->cs;
gdb_stub_registers[PS] = info->eflags;
signo = GDB_UNKNOWN;
- if (info->vector < ARRAY_SIZE(exception_to_signal)) {
+ if (info->vector < ARRAY_SIZE(exception_to_signal))
signo = exception_to_signal[info->vector];
- }
/* reply to the host that an exception has occurred */
out_buffer[0] = 'S';
@@ -410,9 +407,8 @@
char *ptr;
out_buffer[0] = '\0';
out_buffer[1] = '\0';
- if (!get_packet(in_buffer)) {
+ if (!get_packet(in_buffer))
break;
- }
switch(in_buffer[0]) {
case '?': /* last signal */
out_buffer[0] = 'S';
@@ -438,9 +434,8 @@
(*ptr++ == ',') &&
parse_ulong(&ptr, &length)) {
copy_to_hex(out_buffer, (void *)addr, length);
- } else {
+ } else
memcpy(out_buffer, "E01", 4);
- }
break;
case 'M':
/* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
@@ -451,26 +446,22 @@
(*(ptr++) == ':')) {
copy_from_hex((void *)addr, ptr, length);
memcpy(out_buffer, "OK", 3);
- }
- else {
+ } else
memcpy(out_buffer, "E02", 4);
- }
break;
case 's':
case 'c':
/* cAA..AA Continue at address AA..AA(optional) */
/* sAA..AA Step one instruction from AA..AA(optional) */
ptr = &in_buffer[1];
- if (parse_ulong(&ptr, &addr)) {
+ if (parse_ulong(&ptr, &addr))
info->eip = addr;
- }
/* Clear the trace bit */
info->eflags &= ~(1 << 8);
/* Set the trace bit if we are single stepping */
- if (in_buffer[0] == 's') {
+ if (in_buffer[0] == 's')
info->eflags |= (1 << 8);
- }
return;
break;
case 'D':
@@ -513,8 +504,7 @@
* evident from the looking at the dump */
code = (u8*)((uintptr_t)code & ~0x7);
int i;
- for (i = 0; i < MDUMP_SIZE; i++)
- {
+ for (i = 0; i < MDUMP_SIZE; i++) {
if ( (i & 0x07) == 0 )
printk(BIOS_EMERG, "\n%p:\t", code + i);
printk(BIOS_EMERG, "%.2x ", code[i]);
diff --git a/src/arch/x86/include/arch/bootblock_romcc.h b/src/arch/x86/include/arch/bootblock_romcc.h
index eab8a0d..4378d39 100644
--- a/src/arch/x86/include/arch/bootblock_romcc.h
+++ b/src/arch/x86/include/arch/bootblock_romcc.h
@@ -54,9 +54,8 @@
if (cmos_default) {
int i;
cmos_disable_rtc();
- for (i = 14; i < 128; i++) {
+ for (i = 14; i < 128; i++)
cmos_write_inner(cmos_default[i], i);
- }
cmos_enable_rtc();
}
}
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 53c49a1..63359f1 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -306,9 +306,8 @@
for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
unsigned int id;
id = pci_io_read_config32(dev, 0);
- if (id == pci_id) {
+ if (id == pci_id)
return dev;
- }
}
return PCI_DEV_INVALID;
}
@@ -318,9 +317,8 @@
for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
unsigned int id;
id = pci_read_config32(dev, 0);
- if (id == pci_id) {
+ if (id == pci_id)
return dev;
- }
}
return PCI_DEV_INVALID;
}
@@ -335,9 +333,8 @@
for (; dev <=last; dev += PCI_DEV(0,0,1)) {
unsigned int id;
id = pci_read_config32(dev, 0);
- if (id == pci_id) {
+ if (id == pci_id)
return dev;
- }
}
return PCI_DEV_INVALID;
}
diff --git a/src/arch/x86/include/arch/smp/mpspec.h b/src/arch/x86/include/arch/smp/mpspec.h
index 28a3e11..4123e74 100644
--- a/src/arch/x86/include/arch/smp/mpspec.h
+++ b/src/arch/x86/include/arch/smp/mpspec.h
@@ -39,8 +39,7 @@
#define SMP_FLOATING_TABLE_LEN sizeof(struct intel_mp_floating)
-struct intel_mp_floating
-{
+struct intel_mp_floating {
char mpf_signature[4]; /* "_MP_" */
u32 mpf_physptr; /* Configuration table address */
u8 mpf_length; /* Our length (paragraphs) */
@@ -55,8 +54,7 @@
u8 mpf_feature5; /* Unused (0) */
} __attribute__((packed));
-struct mp_config_table
-{
+struct mp_config_table {
char mpc_signature[4];
#define MPC_SIGNATURE "PCMP"
u16 mpc_length; /* Size of table */
@@ -81,8 +79,7 @@
#define MP_INTSRC 3
#define MP_LINTSRC 4
-struct mpc_config_processor
-{
+struct mpc_config_processor {
u8 mpc_type;
u8 mpc_apicid; /* Local APIC number */
u8 mpc_apicver; /* Its versions */
@@ -97,8 +94,7 @@
u32 mpc_reserved[2];
} __attribute__((packed));
-struct mpc_config_bus
-{
+struct mpc_config_bus {
u8 mpc_type;
u8 mpc_busid;
u8 mpc_bustype[6];
@@ -112,8 +108,7 @@
#define BUSTYPE_PCI "PCI"
#define BUSTYPE_PCMCIA "PCMCIA"
-struct mpc_config_ioapic
-{
+struct mpc_config_ioapic {
u8 mpc_type;
u8 mpc_apicid;
u8 mpc_apicver;
@@ -122,8 +117,7 @@
void *mpc_apicaddr;
} __attribute__((packed));
-struct mpc_config_intsrc
-{
+struct mpc_config_intsrc {
u8 mpc_type;
u8 mpc_irqtype;
u16 mpc_irqflag;
@@ -150,8 +144,7 @@
#define MP_IRQ_TRIGGER_MASK 0xc
-struct mpc_config_lintsrc
-{
+struct mpc_config_lintsrc {
u8 mpc_type;
u8 mpc_irqtype;
u16 mpc_irqflag;
diff --git a/src/arch/x86/mpspec.c b/src/arch/x86/mpspec.c
index 5f251e3..da2c21a 100644
--- a/src/arch/x86/mpspec.c
+++ b/src/arch/x86/mpspec.c
@@ -63,9 +63,8 @@
int i;
bytes = v;
checksum = 0;
- for (i = 0; i < len; i++) {
+ for (i = 0; i < len; i++)
checksum -= bytes[i];
- }
return checksum;
}
@@ -443,7 +442,9 @@
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid, 0xf);
}
-void mptable_write_buses(struct mp_config_table *mc, int *max_pci_bus, int *isa_bus) {
+void mptable_write_buses(struct mp_config_table *mc, int *max_pci_bus,
+ int *isa_bus)
+{
int dummy, i, highest;
char buses[256];
struct device *dev;
diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c
index f758dbb..e534a06 100644
--- a/src/arch/x86/pirq_routing.c
+++ b/src/arch/x86/pirq_routing.c
@@ -100,8 +100,7 @@
{
int i, link;
u8 irq = 0;
- for (i = 2; i <= 15; i++)
- {
+ for (i = 2; i <= 15; i++) {
/* Can we assign this IRQ ? */
if (!((bitmap >> i) & 1))
continue;
@@ -161,13 +160,11 @@
}
/* yet not routed */
- if (!pirq[link - 1])
- {
+ if (!pirq[link - 1]) {
irq = pirq_get_next_free_irq(pirq, bitmap);
if (irq)
pirq[link - 1] = irq;
- }
- else
+ } else
irq = pirq[link - 1];
printk(BIOS_DEBUG, "IRQ: %d\n", irq);
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index 8640200..4b1cb83 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -416,11 +416,10 @@
t->bootup_state = SMBIOS_STATE_SAFE;
t->power_supply_state = SMBIOS_STATE_SAFE;
t->thermal_state = SMBIOS_STATE_SAFE;
- if (IS_ENABLED(CONFIG_SYSTEM_TYPE_LAPTOP)) {
+ if (IS_ENABLED(CONFIG_SYSTEM_TYPE_LAPTOP))
t->_type = SMBIOS_ENCLOSURE_NOTEBOOK;
- } else {
+ else
t->_type = SMBIOS_ENCLOSURE_DESKTOP;
- }
t->security_status = SMBIOS_STATE_SAFE;
len = t->length + smbios_string_table_len(t->eos);
*current += len;
@@ -437,9 +436,8 @@
res.eax = res.edx = 0;
res.ebx = 0x10000;
- if (cpu_have_cpuid()) {
+ if (cpu_have_cpuid())
res = cpuid(1);
- }
memset(t, 0, sizeof(struct smbios_type4));
t->type = SMBIOS_PROCESSOR_INFORMATION;
diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c
index edcb717..c63bd39 100644
--- a/src/arch/x86/tables.c
+++ b/src/arch/x86/tables.c
@@ -47,9 +47,9 @@
new_high_table_pointer = write_pirq_routing_table(high_table_pointer);
// FIXME make pirq table code intelligent enough to know how
// much space it's going to need.
- if (new_high_table_pointer > (high_table_pointer + MAX_PIRQ_TABLE_SIZE)) {
+ if (new_high_table_pointer > (high_table_pointer
+ + MAX_PIRQ_TABLE_SIZE))
printk(BIOS_ERR, "ERROR: Increase PIRQ size.\n");
- }
printk(BIOS_DEBUG, "PIRQ table: %ld bytes.\n",
new_high_table_pointer - high_table_pointer);
}
@@ -74,9 +74,9 @@
new_high_table_pointer = write_smp_table(high_table_pointer);
// FIXME make mp table code intelligent enough to know how
// much space it's going to need.
- if (new_high_table_pointer > (high_table_pointer + MAX_MP_TABLE_SIZE)) {
+ if (new_high_table_pointer > (high_table_pointer
+ + MAX_MP_TABLE_SIZE))
printk(BIOS_ERR, "ERROR: Increase MP table size.\n");
- }
printk(BIOS_DEBUG, "MP table: %ld bytes.\n",
new_high_table_pointer - high_table_pointer);
@@ -112,9 +112,9 @@
rom_table_end = ALIGN(rom_table_end, 16);
new_high_table_pointer = write_acpi_tables(high_table_pointer);
- if (new_high_table_pointer > ( high_table_pointer + MAX_ACPI_SIZE)) {
+ if (new_high_table_pointer > ( high_table_pointer
+ + MAX_ACPI_SIZE))
printk(BIOS_ERR, "ERROR: Increase ACPI size\n");
- }
printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n",
new_high_table_pointer - high_table_pointer);
@@ -122,9 +122,9 @@
/* First we look for the high table RSDP */
while (acpi_start < new_high_table_pointer) {
- if (memcmp(((acpi_rsdp_t *)acpi_start)->signature, RSDP_SIG, 8) == 0) {
+ if (memcmp(((acpi_rsdp_t *)acpi_start)->signature,
+ RSDP_SIG, 8) == 0)
break;
- }
acpi_start++;
}
@@ -165,9 +165,9 @@
memcpy((void *)rom_table_end, (void *)high_table_pointer, sizeof(struct smbios_entry));
rom_table_end += sizeof(struct smbios_entry);
- if (new_high_table_pointer > ( high_table_pointer + MAX_SMBIOS_SIZE)) {
+ if (new_high_table_pointer > ( high_table_pointer
+ + MAX_SMBIOS_SIZE))
printk(BIOS_ERR, "ERROR: Increase SMBIOS size\n");
- }
printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n",
new_high_table_pointer - high_table_pointer);
} else {
--
To view, visit https://review.coreboot.org/18861
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: merged
Gerrit-Change-Id: I13d1967757e106c8300a15baed25d920c52a1a95
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Lee Leahy <leroy.p.leahy at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Lee Leahy <leroy.p.leahy at intel.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: build bot (Jenkins)
More information about the coreboot-gerrit
mailing list