[coreboot-gerrit] Change in coreboot[master]: arch/x86: Fix space issues detected by checkpatch

Lee Leahy (Code Review) gerrit at coreboot.org
Fri Mar 17 00:21:49 CET 2017


Lee Leahy has uploaded a new change for review. ( https://review.coreboot.org/18862 )

Change subject: arch/x86: Fix space issues detected by checkpatch
......................................................................

arch/x86: Fix space issues detected by checkpatch

Fix the following errors and warnings detected by checkpatch.pl:

ERROR: space required before the open parenthesis '('
ERROR: space prohibited after that open parenthesis '('
ERROR: space prohibited before that close parenthesis ')'
ERROR: space prohibited after that open square bracket '['
ERROR: space required after that ',' (ctx:VxV)
ERROR: space prohibited before that ',' (ctx:WxW)
ERROR: space required after that ';' (ctx:VxV)
ERROR: spaces required around that ':' (ctx:ExV)
ERROR: spaces required around that ':' (ctx:VxW)
ERROR: spaces required around that ':' (ctx:WxV)
ERROR: spaces required around that '=' (ctx:VxV)
ERROR: spaces required around that '+=' (ctx:VxV)
ERROR: spaces required around that '<=' (ctx:WxV)
ERROR: spaces required around that '||' (ctx:VxW)
ERROR: space prohibited before that '++' (ctx:WxO)
ERROR: need consistent spacing around '+' (ctx:WxV)
ERROR: spaces required around that '<' (ctx:WxV)
ERROR: spaces required around that '<' (ctx:VxV)
ERROR: need consistent spacing around '>>' (ctx:WxV)
ERROR: "(foo*)" should be "(foo *)"
ERROR: "foo* bar" should be "foo *bar"
ERROR: "foo * bar" should be "foo *bar"
ERROR: code indent should use tabs where possible
WARNING: space prohibited between function name and open parenthesis '('
WARNING: unnecessary whitespace before a quoted newline
WARNING: please, no spaces at the start of a line
WARNING: please, no space before tabs
WARNING: Unnecessary space before function pointer arguments

TEST=Build and run on Galileo Gen2

Change-Id: I2d7e1a329c6b2e8ca9633a97b595566544d7fd33
Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
---
M src/arch/x86/acpi.c
M src/arch/x86/acpi_s3.c
M src/arch/x86/boot.c
M src/arch/x86/bootblock_simple.c
M src/arch/x86/cpu.c
M src/arch/x86/ebda.c
M src/arch/x86/exception.c
M src/arch/x86/gdt.c
M src/arch/x86/include/arch/acpi.h
M src/arch/x86/include/arch/acpi_device.h
M src/arch/x86/include/arch/acpigen.h
M src/arch/x86/include/arch/bootblock_romcc.h
M src/arch/x86/include/arch/cbfs.h
M src/arch/x86/include/arch/cpu.h
M src/arch/x86/include/arch/early_variables.h
M src/arch/x86/include/arch/io.h
M src/arch/x86/include/arch/smp/atomic.h
M src/arch/x86/include/arch/smp/spinlock.h
M src/arch/x86/memmove.c
M src/arch/x86/mmap_boot.c
M src/arch/x86/mpspec.c
M src/arch/x86/pci_ops_conf1.c
M src/arch/x86/pirq_routing.c
M src/arch/x86/smbios.c
M src/arch/x86/tables.c
M src/arch/x86/thread.c
26 files changed, 127 insertions(+), 119 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/18862/1

diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
index 4109ec4..eeab3b3 100644
--- a/src/arch/x86/acpi.c
+++ b/src/arch/x86/acpi.c
@@ -272,7 +272,7 @@
 	}
 
 	printk(BIOS_DEBUG, "TCPA log created at %p\n", lasa);
-	memset (lasa, 0, tcpa_default_log_len);
+	memset(lasa, 0, tcpa_default_log_len);
 
 	*size = tcpa_default_log_len;
 	return lasa;
@@ -420,7 +420,7 @@
 }
 
 void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
-		      unsigned long (*acpi_fill_dmar) (unsigned long))
+		      unsigned long (*acpi_fill_dmar)(unsigned long))
 {
 	acpi_header_t *header = &(dmar->header);
 	unsigned long current = (unsigned long)dmar + sizeof(acpi_dmar_t);
@@ -580,7 +580,7 @@
 	addr->addrl = CONFIG_HPET_ADDRESS & 0xffffffff;
 	addr->addrh = ((unsigned long long)CONFIG_HPET_ADDRESS) >> 32;
 
-	hpet->id = *(unsigned int*)CONFIG_HPET_ADDRESS;
+	hpet->id = *(unsigned int *)CONFIG_HPET_ADDRESS;
 	hpet->number = 0;
 	hpet->min_tick = CONFIG_HPET_MIN_TICKS;
 
@@ -613,7 +613,7 @@
 }
 
 void acpi_create_ivrs(acpi_ivrs_t *ivrs,
-		      unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t* ivrs_struct, unsigned long current))
+		      unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct, unsigned long current))
 {
 	acpi_header_t *header = &(ivrs->header);
 	unsigned long current = (unsigned long)ivrs + sizeof(acpi_ivrs_t);
@@ -786,7 +786,7 @@
 		printk(BIOS_DEBUG, "Invalid type of Error Source.");
 		break;
 	}
-	hest->error_source_count ++;
+	hest->error_source_count++;
 
 	memcpy(pos, data, data_len);
 	len += data_len;
@@ -817,7 +817,7 @@
 }
 
 #if IS_ENABLED(CONFIG_COMMON_FADT)
-void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs, void *dsdt)
+void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
 {
 	acpi_header_t *header = &(fadt->header);
 
@@ -1015,8 +1015,8 @@
 	madt = (acpi_madt_t *) current;
 	acpi_create_madt(madt);
 	if (madt->header.length > sizeof(acpi_madt_t)) {
-		current+=madt->header.length;
-		acpi_add_table(rsdp,madt);
+		current += madt->header.length;
+		acpi_add_table(rsdp, madt);
 	}
 	current = acpi_align_current(current);
 
diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c
index 0001885..ea04029 100644
--- a/src/arch/x86/acpi_s3.c
+++ b/src/arch/x86/acpi_s3.c
@@ -133,7 +133,7 @@
 		return NULL;
 
 	backup_mem->valid = 1;
-	return (void*)(uintptr_t)backup_mem->cbmem;
+	return (void *)(uintptr_t)backup_mem->cbmem;
 }
 
 void backup_ramstage_section(uintptr_t base, size_t size)
@@ -157,8 +157,8 @@
 		return;
 
 	/* Back up the OS-controlled memory where ramstage will be loaded. */
-	memcpy((void*)(uintptr_t)backup_mem->cbmem,
-		(void*)(uintptr_t)backup_mem->lowmem, (size_t)backup_mem->size);
+	memcpy((void *)(uintptr_t)backup_mem->cbmem,
+		(void *)(uintptr_t)backup_mem->lowmem, (size_t)backup_mem->size);
 	backup_mem->valid = 1;
 }
 
@@ -174,8 +174,8 @@
 		return;
 
 	/* Back up the OS-controlled memory where ramstage will be loaded. */
-	memcpy((void*)(uintptr_t)backup_mem->cbmem,
-		(void*)(uintptr_t)backup_mem->lowmem, (size_t)backup_mem->size);
+	memcpy((void *)(uintptr_t)backup_mem->cbmem,
+		(void *)(uintptr_t)backup_mem->lowmem, (size_t)backup_mem->size);
 	backup_mem->valid = 1;
 }
 
@@ -199,7 +199,7 @@
 #define WAKEUP_BASE 0x600
 
 void (*acpi_do_wakeup)(uintptr_t vector, u32 backup_source, u32 backup_target,
-       u32 backup_size) asmlinkage = (void *)WAKEUP_BASE;
+	u32 backup_size) asmlinkage = (void *)WAKEUP_BASE;
 
 extern unsigned char __wakeup;
 extern unsigned int __wakeup_size;
diff --git a/src/arch/x86/boot.c b/src/arch/x86/boot.c
index ba78c4e..b9e6ee9 100644
--- a/src/arch/x86/boot.c
+++ b/src/arch/x86/boot.c
@@ -24,13 +24,13 @@
 {
 	/* Jump to kernel */
 	__asm__ __volatile__(
-		"	cld	\n\t"
+		"	cld\n\t"
 		/* Now jump to the loaded image */
 		"	call	*%0\n\t"
 
 		/* The loaded image returned? */
-		"	cli	\n\t"
-		"	cld	\n\t"
+		"	cli\n\t"
+		"	cld\n\t"
 
 		::
 		"r" (entry)
@@ -51,7 +51,7 @@
 
 	/* Jump to kernel */
 	__asm__ __volatile__(
-		"	cld	\n\t"
+		"	cld\n\t"
 #ifdef __x86_64__
 		/* switch back to 32-bit mode */
 		"       push    %4\n\t"
@@ -138,7 +138,7 @@
 		"	movl	$1f, %%eax\n\t"
 		"	addl	20(%%esp), %%eax\n\t"
 		"	jmp	*%%eax\n\t"
-		"1:	\n\t"
+		"1:\n\t"
 
 		/* Copy the coreboot bounce buffer over coreboot */
 		/* Move ``longs'' the coreboot size is 4 byte aligned */
@@ -154,8 +154,8 @@
 		"	call	*4(%%esp)\n\t"
 
 		/* The loaded image returned? */
-		"	cli	\n\t"
-		"	cld	\n\t"
+		"	cli\n\t"
+		"	cld\n\t"
 
 		/* Copy the saved copy of coreboot where coreboot runs */
 		/* Move ``longs'' the coreboot size is 4 byte aligned */
@@ -173,7 +173,7 @@
 		"	movl	$1f, %%eax\n\t"
 		"	subl	20(%%esp), %%eax\n\t"
 		"	jmp	*%%eax\n\t"
-		"1:	\n\t"
+		"1:\n\t"
 
 		/* Drop the parameters I was passed */
 		"	addl	$24, %%esp\n\t"
diff --git a/src/arch/x86/bootblock_simple.c b/src/arch/x86/bootblock_simple.c
index 5a0b56b..6b41718 100644
--- a/src/arch/x86/bootblock_simple.c
+++ b/src/arch/x86/bootblock_simple.c
@@ -29,9 +29,9 @@
 	}
 
 #if CONFIG_SEPARATE_VERSTAGE
-	const char* target1 = "fallback/verstage";
+	const char *target1 = "fallback/verstage";
 #else
-	const char* target1 = "fallback/romstage";
+	const char *target1 = "fallback/romstage";
 #endif
 
 	unsigned long entry;
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c
index e53390f..4b82759 100644
--- a/src/arch/x86/cpu.c
+++ b/src/arch/x86/cpu.c
@@ -93,7 +93,7 @@
 		"	jnz	1f\n"
 		"	movl	$1, %%eax\n"
 		"1:\n"
-		: "=a" (ret) : : "cx", "dx" );
+		: "=a" (ret) : : "cx", "dx");
 	return  ret;
 }
 #endif
@@ -168,17 +168,17 @@
 		int  cpuid_level;
 		struct cpuid_result result;
 		result = cpuid(0x00000000);
-		cpuid_level    = result.eax;
-		vendor_name[ 0] = (result.ebx >>  0) & 0xff;
-		vendor_name[ 1] = (result.ebx >>  8) & 0xff;
-		vendor_name[ 2] = (result.ebx >> 16) & 0xff;
-		vendor_name[ 3] = (result.ebx >> 24) & 0xff;
-		vendor_name[ 4] = (result.edx >>  0) & 0xff;
-		vendor_name[ 5] = (result.edx >>  8) & 0xff;
-		vendor_name[ 6] = (result.edx >> 16) & 0xff;
-		vendor_name[ 7] = (result.edx >> 24) & 0xff;
-		vendor_name[ 8] = (result.ecx >>  0) & 0xff;
-		vendor_name[ 9] = (result.ecx >>  8) & 0xff;
+		cpuid_level     = result.eax;
+		vendor_name[0]  = (result.ebx >>  0) & 0xff;
+		vendor_name[1]  = (result.ebx >>  8) & 0xff;
+		vendor_name[2]  = (result.ebx >> 16) & 0xff;
+		vendor_name[3]  = (result.ebx >> 24) & 0xff;
+		vendor_name[4]  = (result.edx >>  0) & 0xff;
+		vendor_name[5]  = (result.edx >>  8) & 0xff;
+		vendor_name[6]  = (result.edx >> 16) & 0xff;
+		vendor_name[7]  = (result.edx >> 24) & 0xff;
+		vendor_name[8]  = (result.ecx >>  0) & 0xff;
+		vendor_name[9]  = (result.ecx >>  8) & 0xff;
 		vendor_name[10] = (result.ecx >> 16) & 0xff;
 		vendor_name[11] = (result.ecx >> 24) & 0xff;
 		vendor_name[12] = '\0';
diff --git a/src/arch/x86/ebda.c b/src/arch/x86/ebda.c
index 893e7dc..284b5be 100644
--- a/src/arch/x86/ebda.c
+++ b/src/arch/x86/ebda.c
@@ -37,7 +37,7 @@
 
 	/* Set up EBDA */
 	memset((void *)((uintptr_t)ebda_segment << 4), 0, ebda_size);
-	write16((void*)((uintptr_t)ebda_segment << 4), (ebda_size >> 10));
+	write16((void *)((uintptr_t)ebda_segment << 4), (ebda_size >> 10));
 }
 
 void setup_default_ebda(void)
diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c
index 1d83a00..65bd33e 100644
--- a/src/arch/x86/exception.c
+++ b/src/arch/x86/exception.c
@@ -266,7 +266,7 @@
 	start = *ptr;
 	*value = 0;
 
-	while((digit = hex(**ptr)) >= 0) {
+	while ((digit = hex(**ptr)) >= 0) {
 		*value = ((*value) << 4) | digit;
 		(*ptr)++;
 	}
@@ -280,7 +280,7 @@
 	unsigned char ch;
 	char *mem = addr;
 
-	while(count--) {
+	while (count--) {
 		ch = *mem++;
 		*buf++ = hexchars[ch >> 4];
 		*buf++ = hexchars[ch & 0x0f];
@@ -297,9 +297,9 @@
 	unsigned char ch;
 	char *mem = addr;
 
-	while(count--) {
-		ch = hex (*buf++) << 4;
-		ch = ch + hex (*buf++);
+	while (count--) {
+		ch = hex(*buf++) << 4;
+		ch = ch + hex(*buf++);
 		*mem++ = ch;
 	}
 }
@@ -346,7 +346,7 @@
 				stub_flush();
 			}
 		}
-	} while(checksum != xmitcsum);
+	} while (checksum != xmitcsum);
 	return 1;
 }
 
@@ -402,14 +402,14 @@
 	out_buffer[3] = '\0';
 	put_packet(out_buffer);
 
-	while(1) {
+	while (1) {
 		unsigned long addr, length;
 		char *ptr;
 		out_buffer[0] = '\0';
 		out_buffer[1] = '\0';
 		if (!get_packet(in_buffer))
 			break;
-		switch(in_buffer[0]) {
+		switch (in_buffer[0]) {
 		case '?': /* last signal */
 			out_buffer[0] = 'S';
 			out_buffer[1] = hexchars[(signo >> 4) & 0xf];
@@ -425,12 +425,12 @@
 			info->eip    = gdb_stub_registers[PC];
 			info->cs     = gdb_stub_registers[CS];
 			info->eflags = gdb_stub_registers[PS];
-			memcpy(out_buffer, "OK",3);
+			memcpy(out_buffer, "OK", 3);
 			break;
 		case 'm':
 			/* mAA..AA,LLLL  Read LLLL bytes at address AA..AA */
 			ptr = &in_buffer[1];
-			if (	parse_ulong(&ptr, &addr) &&
+			if (parse_ulong(&ptr, &addr) &&
 				(*ptr++ == ',') &&
 				parse_ulong(&ptr, &length)) {
 				copy_to_hex(out_buffer, (void *)addr, length);
@@ -440,7 +440,7 @@
 		case 'M':
 			/* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
 			ptr = &in_buffer[1];
-			if (	parse_ulong(&ptr, &addr) &&
+			if (parse_ulong(&ptr, &addr) &&
 				(*(ptr++) == ',') &&
 				parse_ulong(&ptr, &length) &&
 				(*(ptr++) == ':')) {
@@ -498,14 +498,14 @@
 		info->error_code, info->eflags,
 		info->eax, info->ebx, info->ecx, info->edx,
 		info->edi, info->esi, info->ebp, info->esp);
-	u8 *code = (u8*)((uintptr_t)info->eip - (MDUMP_SIZE >>1));
+	u8 *code = (u8 *)((uintptr_t)info->eip - (MDUMP_SIZE >> 1));
 	/* Align to 8-byte boundary please, and print eight bytes per row.
 	 * This is done to make DRAM burst timing/reordering errors more
 	 * evident from the looking at the dump */
-	code = (u8*)((uintptr_t)code & ~0x7);
+	code = (u8 *)((uintptr_t)code & ~0x7);
 	int i;
 	for (i = 0; i < MDUMP_SIZE; i++) {
-		if ( (i & 0x07) == 0 )
+		if ((i & 0x07) == 0)
 			printk(BIOS_EMERG, "\n%p:\t", code + i);
 		printk(BIOS_EMERG, "%.2x ", code[i]);
 	}
diff --git a/src/arch/x86/gdt.c b/src/arch/x86/gdt.c
index f662edd..c81bd61 100644
--- a/src/arch/x86/gdt.c
+++ b/src/arch/x86/gdt.c
@@ -49,7 +49,7 @@
 			printk(BIOS_ERR, "Error: Could not relocate GDT.\n");
 			return;
 		}
-		memcpy((void*)newgdt, &gdt, num_gdt_bytes);
+		memcpy((void *)newgdt, &gdt, num_gdt_bytes);
 	}
 	printk(BIOS_DEBUG, "Moving GDT to %p...", newgdt);
 
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index a767a45..41c4fa7 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -502,7 +502,7 @@
 	PM_MOBILE		= 2,
 	PM_WORKSTATION		= 3,
 	PM_ENTERPRISE_SERVER	= 4,
-	PM_SOHO_SERVER  	= 5,
+	PM_SOHO_SERVER		= 5,
 	PM_APPLIANCE_PC		= 6,
 	PM_PERFORMANCE_SERVER	= 7,
 	PM_TABLET		= 8,	/* ACPI 5.0 */
@@ -589,11 +589,11 @@
 unsigned long write_acpi_tables(unsigned long addr);
 unsigned long acpi_fill_madt(unsigned long current);
 unsigned long acpi_fill_mcfg(unsigned long current);
-unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current);
+unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t *ivrs, unsigned long current);
 void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id);
-void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs, void *dsdt);
+void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt);
 #if IS_ENABLED(CONFIG_COMMON_FADT)
-void acpi_fill_fadt(acpi_fadt_t * fadt);
+void acpi_fill_fadt(acpi_fadt_t *fadt);
 #endif
 
 void update_ssdt(void *ssdt);
@@ -617,7 +617,7 @@
 					  u8 lint);
 
 int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic);
-int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek,u32 sizek,
+int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,
 			 u32 flags);
 int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base,
 			      u16 seg_nr, u8 start, u8 end);
@@ -631,10 +631,11 @@
 void acpi_create_vfct(struct device *device,
 		      struct acpi_vfct *vfct,
 		      unsigned long (*acpi_fill_vfct)(struct device *device,
-		          struct acpi_vfct *vfct_struct, unsigned long current));
+				struct acpi_vfct *vfct_struct,
+				unsigned long current));
 
 void acpi_create_ivrs(acpi_ivrs_t *ivrs,
-		      unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t* ivrs_struct, unsigned long current));
+		      unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct, unsigned long current));
 
 #if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
 void acpi_create_hpet(acpi_hpet_t *hpet);
@@ -649,7 +650,7 @@
 void acpi_create_facs(acpi_facs_t *facs);
 
 void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
-		      unsigned long (*acpi_fill_dmar) (unsigned long));
+		      unsigned long (*acpi_fill_dmar)(unsigned long));
 unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
 				    u16 segment, u32 bar);
 unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h
index 084e8af..29e0e8d 100644
--- a/src/arch/x86/include/arch/acpi_device.h
+++ b/src/arch/x86/include/arch/acpi_device.h
@@ -136,7 +136,7 @@
 };
 
 #define ACPI_GPIO_REVISION_ID		1
-#define ACPI_GPIO_MAX_PINS 		8
+#define ACPI_GPIO_MAX_PINS		8
 
 struct acpi_gpio {
 	int pin_count;
diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index c1c4d59..c70e4b9 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -205,11 +205,11 @@
 void acpigen_write_TPC(const char *gnvs_tpc_limit);
 void acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, u32 busmLat,
 			u32 control, u32 status);
-typedef enum { SW_ALL=0xfc, SW_ANY=0xfd, HW_ALL=0xfe } PSD_coord;
+typedef enum { SW_ALL = 0xfc, SW_ANY = 0xfd, HW_ALL = 0xfe } PSD_coord;
 void acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype);
 void acpigen_write_CST_package_entry(acpi_cstate_t *cstate);
 void acpigen_write_CST_package(acpi_cstate_t *entry, int nentries);
-typedef enum { CSD_HW_ALL=0xfe } CSD_coord;
+typedef enum { CSD_HW_ALL = 0xfe } CSD_coord;
 void acpigen_write_CSD_package(u32 domain, u32 numprocs, CSD_coord coordtype, u32 index);
 void acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len);
 void acpigen_write_TSS_package(int entries, acpi_tstate_t *tstate_list);
diff --git a/src/arch/x86/include/arch/bootblock_romcc.h b/src/arch/x86/include/arch/bootblock_romcc.h
index 4378d39..2e96d2a 100644
--- a/src/arch/x86/include/arch/bootblock_romcc.h
+++ b/src/arch/x86/include/arch/bootblock_romcc.h
@@ -50,7 +50,7 @@
 static void sanitize_cmos(void)
 {
 	if (cmos_error() || !cmos_chksum_valid() || IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) {
-		unsigned char *cmos_default = (unsigned char*)walkcbfs("cmos.default");
+		unsigned char *cmos_default = (unsigned char *)walkcbfs("cmos.default");
 		if (cmos_default) {
 			int i;
 			cmos_disable_rtc();
diff --git a/src/arch/x86/include/arch/cbfs.h b/src/arch/x86/include/arch/cbfs.h
index 01a7b32..81100a5 100644
--- a/src/arch/x86/include/arch/cbfs.h
+++ b/src/arch/x86/include/arch/cbfs.h
@@ -19,7 +19,7 @@
 #include <commonlib/cbfs_serialized.h>
 #include <endian.h>
 
-#define CBFS_SUBHEADER(_p) ( (void *) ((((uint8_t *) (_p)) + ntohl((_p)->offset))) )
+#define CBFS_SUBHEADER(_p) ((void *)((((uint8_t *)(_p)) + ntohl((_p)->offset))))
 
 static struct cbfs_file *walkcbfs_head(char *target)
 {
@@ -47,7 +47,7 @@
 	unsigned long entry; // this is really 64bit, but properly endianized
 };
 
-static inline unsigned long findstage(char* target)
+static inline unsigned long findstage(char *target)
 {
 	struct cbfs_stage_restricted *stage = walkcbfs(target);
 	if ((u32)stage != 0)
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 9c94ab1e..936dcf4 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -204,7 +204,7 @@
 		"andl %%esp,%0; "
 		"orl  %2, %0 "
 #endif
-		:"=r" (ci)
+		: "=r" (ci)
 		: "0" (~(CONFIG_STACK_SIZE - 1)),
 		"r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
 	);
diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h
index e78b846..b48848e 100644
--- a/src/arch/x86/include/arch/early_variables.h
+++ b/src/arch/x86/include/arch/early_variables.h
@@ -24,9 +24,9 @@
 asm(".section .car.global_data,\"w\", at nobits");
 asm(".previous");
 #ifdef __clang__
-#define CAR_GLOBAL __attribute__((used,section(".car.global_data")))
+#define CAR_GLOBAL __attribute__((used, section(".car.global_data")))
 #else
-#define CAR_GLOBAL __attribute__((used,section(".car.global_data#")))
+#define CAR_GLOBAL __attribute__((used, section(".car.global_data#")))
 #endif /* __clang__ */
 
 /*
@@ -56,9 +56,9 @@
 #define car_get_var(var) \
 	*(typeof(var) *)car_get_var_ptr(&(var))
 #define car_sync_var(var) \
-	*(typeof (var) *)car_sync_var_ptr(&(var))
+	*(typeof(var) *)car_sync_var_ptr(&(var))
 #define car_set_var(var, val) \
-	do { car_get_var(var) = (val); } while(0)
+	do { car_get_var(var) = (val); } while (0)
 
 static inline size_t car_data_size(void)
 {
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 63359f1..0edddb0 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -303,7 +303,7 @@
 #define PCI_DEV_INVALID (0xffffffffU)
 static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev)
 {
-	for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
+	for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) {
 		unsigned int id;
 		id = pci_io_read_config32(dev, 0);
 		if (id == pci_id)
@@ -314,7 +314,7 @@
 
 static inline pci_devfn_t pci_locate_device(unsigned pci_id, pci_devfn_t dev)
 {
-	for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
+	for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) {
 		unsigned int id;
 		id = pci_read_config32(dev, 0);
 		if (id == pci_id)
@@ -330,7 +330,7 @@
 	dev = PCI_DEV(bus, 0, 0);
 	last = PCI_DEV(bus, 31, 7);
 
-	for (; dev <=last; dev += PCI_DEV(0,0,1)) {
+	for (; dev <= last; dev += PCI_DEV(0, 0, 1)) {
 		unsigned int id;
 		id = pci_read_config32(dev, 0);
 		if (id == pci_id)
@@ -343,15 +343,15 @@
 static inline __attribute__((always_inline)) void pnp_write_config(pnp_devfn_t dev, uint8_t reg, uint8_t value)
 {
 	unsigned port = dev >> 8;
-	outb(reg, port );
-	outb(value, port +1);
+	outb(reg, port);
+	outb(value, port + 1);
 }
 
 static inline __attribute__((always_inline)) uint8_t pnp_read_config(pnp_devfn_t dev, uint8_t reg)
 {
 	unsigned port = dev >> 8;
 	outb(reg, port);
-	return inb(port +1);
+	return inb(port + 1);
 }
 
 static inline __attribute__((always_inline))
diff --git a/src/arch/x86/include/arch/smp/atomic.h b/src/arch/x86/include/arch/smp/atomic.h
index a3ff16a..258c329 100644
--- a/src/arch/x86/include/arch/smp/atomic.h
+++ b/src/arch/x86/include/arch/smp/atomic.h
@@ -46,7 +46,7 @@
  * Atomically sets the value of v to i.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  */
-#define atomic_set(v,i)		(((v)->counter) = (i))
+#define atomic_set(v, i)	(((v)->counter) = (i))
 
 /**
  * atomic_inc - increment atomic variable
@@ -59,8 +59,8 @@
 {
 	__asm__ __volatile__(
 		"lock ; incl %0"
-		:"=m" (v->counter)
-		:"m" (v->counter));
+		: "=m" (v->counter)
+		: "m" (v->counter));
 }
 
 /**
@@ -74,8 +74,8 @@
 {
 	__asm__ __volatile__(
 		"lock ; decl %0"
-		:"=m" (v->counter)
-		:"m" (v->counter));
+		: "=m" (v->counter)
+		: "m" (v->counter));
 }
 
 
diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
index 767f96e..716de15 100644
--- a/src/arch/x86/include/arch/smp/spinlock.h
+++ b/src/arch/x86/include/arch/smp/spinlock.h
@@ -30,9 +30,9 @@
 #ifdef __PRE_RAM__
 spinlock_t *romstage_console_lock(void);
 void initialize_romstage_console_lock(void);
-spinlock_t* romstage_nvram_cbfs_lock(void);
+spinlock_t *romstage_nvram_cbfs_lock(void);
 void initialize_romstage_nvram_cbfs_lock(void);
-spinlock_t* romstage_microcode_cbfs_lock(void);
+spinlock_t *romstage_microcode_cbfs_lock(void);
 void initialize_romstage_microcode_cbfs_lock(void);
 #endif
 
@@ -50,9 +50,9 @@
  *
  * We make no fairness assumptions. They have a cost.
  */
-#define barrier() __asm__ __volatile__("": : :"memory")
+#define barrier() __asm__ __volatile__("" : : : "memory")
 #define spin_is_locked(x)	(*(volatile char *)(&(x)->lock) <= 0)
-#define spin_unlock_wait(x)	do { barrier(); } while(spin_is_locked(x))
+#define spin_unlock_wait(x)	do { barrier(); } while (spin_is_locked(x))
 
 #define spin_lock_string \
 	"\n1:\t" \
@@ -76,31 +76,31 @@
 {
 	__asm__ __volatile__(
 		spin_lock_string
-		:"=m" (lock->lock) : : "memory");
+		: "=m" (lock->lock) : : "memory");
 }
 
 static inline __attribute__((always_inline)) void spin_unlock(spinlock_t *lock)
 {
 	__asm__ __volatile__(
 		spin_unlock_string
-		:"=m" (lock->lock) : : "memory");
+		: "=m" (lock->lock) : : "memory");
 }
 
 /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
 static inline __attribute__((always_inline)) void cpu_relax(void)
 {
-	__asm__ __volatile__("rep;nop": : :"memory");
+	__asm__ __volatile__("rep;nop" : : : "memory");
 }
 
 #else /* !__PRE_RAM__ */
 
 #define DECLARE_SPIN_LOCK(x)
-#define barrier()		do {} while(0)
+#define barrier()		do {} while (0)
 #define spin_is_locked(lock)	0
-#define spin_unlock_wait(lock)	do {} while(0)
-#define spin_lock(lock)		do {} while(0)
-#define spin_unlock(lock)	do {} while(0)
-#define cpu_relax()		do {} while(0)
+#define spin_unlock_wait(lock)	do {} while (0)
+#define spin_lock(lock)		do {} while (0)
+#define spin_unlock(lock)	do {} while (0)
+#define cpu_relax()		do {} while (0)
 
 #endif /* !__PRE_RAM__ */
 
diff --git a/src/arch/x86/memmove.c b/src/arch/x86/memmove.c
index 7c554b8..2cd7e48 100644
--- a/src/arch/x86/memmove.c
+++ b/src/arch/x86/memmove.c
@@ -18,7 +18,7 @@
 
 void *memmove(void *dest, const void *src, size_t n)
 {
-	int d0,d1,d2,d3,d4,d5;
+	int d0, d1, d2, d3, d4, d5;
 	char *ret = dest;
 
 	__asm__ __volatile__(
@@ -192,11 +192,11 @@
 		".p2align 4\n\t"
 		"11:"
 		: "=&c" (d0), "=&S" (d1), "=&D" (d2),
-		  "=r" (d3),"=r" (d4), "=r"(d5)
-		:"0" (n),
+		  "=r" (d3), "=r" (d4), "=r"(d5)
+		: "0" (n),
 		 "1" (src),
 		 "2" (dest)
-		:"memory");
+		: "memory");
 
 	return ret;
 
diff --git a/src/arch/x86/mmap_boot.c b/src/arch/x86/mmap_boot.c
index 35a7544..b03a17e 100644
--- a/src/arch/x86/mmap_boot.c
+++ b/src/arch/x86/mmap_boot.c
@@ -43,7 +43,7 @@
 	/* The offset is relative to the end of the media. */
 	offset += CONFIG_ROM_SIZE;
 
-	rdev_readat(bdev, &header , offset, sizeof(header));
+	rdev_readat(bdev, &header, offset, sizeof(header));
 
 	header.magic = ntohl(header.magic);
 	header.romsize = ntohl(header.romsize);
diff --git a/src/arch/x86/mpspec.c b/src/arch/x86/mpspec.c
index da2c21a..d1a2da2 100644
--- a/src/arch/x86/mpspec.c
+++ b/src/arch/x86/mpspec.c
@@ -169,7 +169,7 @@
 	cpu_features = result.eax;
 	cpu_feature_flags = result.edx;
 	/* order the output of the cpus to fix a bug in kernel 2.6.11 */
-	for (order_id = 0;order_id <256; order_id++) {
+	for (order_id = 0; order_id < 256; order_id++) {
 		for (cpu = all_devices; cpu; cpu = cpu->next) {
 			unsigned long cpu_flag;
 			if ((cpu->path.type != DEVICE_PATH_APIC) ||
@@ -424,10 +424,10 @@
 {
 /*I/O Ints:                   Type         Trigger            Polarity         Bus ID   IRQ  APIC ID   PIN# */
 	smp_write_intsrc(mc, external_int2?mp_INT:mp_ExtINT,
-	                             MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid, 0x0);
+				     MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid, 0x1);
 	smp_write_intsrc(mc, external_int2?mp_ExtINT:mp_INT,
-	                             MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid, 0x2);
+				     MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid, 0x2);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x3, apicid, 0x3);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x4, apicid, 0x4);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x6, apicid, 0x6);
@@ -467,7 +467,7 @@
 			if (highest < bus->secondary) highest = bus->secondary;
 		}
 	}
-	for (i=0; i <= highest; i++) {
+	for (i = 0; i <= highest; i++) {
 		if (buses[i]) {
 			smp_write_bus(mc, i, "PCI   ");
 			*max_pci_bus = i;
@@ -556,7 +556,7 @@
 		if (!have_fixed_entries) {
 			pin = (dev->path.pci.devfn & 7) % 4;
 			oldparent = parent = dev;
-			while((parent = parent->bus->dev)) {
+			while ((parent = parent->bus->dev)) {
 				parentpin = (oldparent->path.pci.devfn >> 3) + (oldparent->path.pci.devfn & 7);
 				parentpin += dev->path.pci.devfn & 7;
 				parentpin += dev->path.pci.devfn >> 3;
diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c
index 2310810..61d1d96 100644
--- a/src/arch/x86/pci_ops_conf1.c
+++ b/src/arch/x86/pci_ops_conf1.c
@@ -21,10 +21,10 @@
  */
 
 #if !CONFIG_PCI_IO_CFG_EXT
-#define CONFIG_CMD(bus,devfn, where)	(0x80000000 | (bus << 16) | \
+#define CONFIG_CMD(bus, devfn, where)	(0x80000000 | (bus << 16) | \
 										(devfn << 8) | (where & ~3))
 #else
-#define CONFIG_CMD(bus,devfn, where)	(0x80000000 | (bus << 16) | \
+#define CONFIG_CMD(bus, devfn, where)	(0x80000000 | (bus << 16) | \
 										(devfn << 8) | ((where & 0xff) & ~3) |\
 										((where & 0xf00)<<16))
 #endif
diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c
index e534a06..e844513 100644
--- a/src/arch/x86/pirq_routing.c
+++ b/src/arch/x86/pirq_routing.c
@@ -23,7 +23,7 @@
 static void check_pirq_routing_table(struct irq_routing_table *rt)
 {
 	uint8_t *addr = (uint8_t *)rt;
-	uint8_t sum=0;
+	uint8_t sum = 0;
 	int i;
 
 	printk(BIOS_INFO, "Checking Interrupt Routing Table consistency...\n");
@@ -33,7 +33,7 @@
 			       (unsigned int) sizeof(struct irq_routing_table),
 			       rt->size
 			);
-		rt->size=sizeof(struct irq_routing_table);
+		rt->size = sizeof(struct irq_routing_table);
 	}
 
 	for (i = 0; i < rt->size; i++)
@@ -52,13 +52,13 @@
 	}
 
 	if (rt->signature != PIRQ_SIGNATURE || rt->version != PIRQ_VERSION ||
-	    rt->size % 16 ) {
+	    rt->size % 16) {
 		printk(BIOS_WARNING, "Interrupt Routing Table not valid.\n");
 		return;
 	}
 
 	sum = 0;
-	for (i=0; i<rt->size; i++)
+	for (i = 0; i < rt->size; i++)
 		sum += addr[i];
 
 	/* We're manually fixing the checksum above. This warning can probably
@@ -78,8 +78,8 @@
 	int i;
 	uint8_t *rt_orig, *rt_curr;
 
-	rt_curr = (uint8_t*)addr;
-	rt_orig = (uint8_t*)routing_table;
+	rt_curr = (uint8_t *)addr;
+	rt_orig = (uint8_t *)routing_table;
 	printk(BIOS_INFO, "Verifying copy of Interrupt Routing Table at 0x%08lx... ", addr);
 	for (i = 0; i < routing_table->size; i++) {
 		if (*(rt_curr + i) != *(rt_orig + i)) {
@@ -96,7 +96,7 @@
 #endif
 
 #if CONFIG_PIRQ_ROUTE
-static u8 pirq_get_next_free_irq(u8* pirq, u16 bitmap)
+static u8 pirq_get_next_free_irq(u8 *pirq, u16 bitmap)
 {
 	int i, link;
 	u8 irq = 0;
@@ -152,7 +152,7 @@
 			printk(BIOS_DEBUG, "INT: %c link: %x bitmap: %x  ",
 				'A' + intx, link, bitmap);
 
-			if (!bitmap|| !link || link > CONFIG_MAX_PIRQ_LINKS) {
+			if (!bitmap || !link || link > CONFIG_MAX_PIRQ_LINKS) {
 
 				printk(BIOS_DEBUG, "not routed\n");
 				irq_slot[intx] = irq;
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index 4b1cb83..9276fc2 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -75,7 +75,7 @@
 	char *p = start;
 	int i, len = 0;
 
-	while(*p) {
+	while (*p) {
 		i = strlen(p) + 1;
 		p += i;
 		len += i;
@@ -576,7 +576,14 @@
 	return len;
 }
 
-#define update_max(len, max_len, stmt) do { int tmp = stmt; max_len = MAX(max_len, tmp); len += tmp; } while(0)
+#define update_max(len, max_len, stmt)		\
+	do {					\
+		int tmp = stmt;			\
+						\
+		max_len = MAX(max_len, tmp);	\
+		len += tmp;			\
+	} while (0)
+
 unsigned long smbios_write_tables(unsigned long current)
 {
 	struct smbios_entry *se;
diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c
index c63bd39..93bd0dd 100644
--- a/src/arch/x86/tables.c
+++ b/src/arch/x86/tables.c
@@ -112,7 +112,7 @@
 
 		rom_table_end = ALIGN(rom_table_end, 16);
 		new_high_table_pointer = write_acpi_tables(high_table_pointer);
-		if (new_high_table_pointer > ( high_table_pointer
+		if (new_high_table_pointer > (high_table_pointer
 			+ MAX_ACPI_SIZE))
 			printk(BIOS_ERR, "ERROR: Increase ACPI size\n");
 		printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n",
@@ -165,7 +165,7 @@
 		memcpy((void *)rom_table_end, (void *)high_table_pointer, sizeof(struct smbios_entry));
 		rom_table_end += sizeof(struct smbios_entry);
 
-		if (new_high_table_pointer > ( high_table_pointer
+		if (new_high_table_pointer > (high_table_pointer
 			+ MAX_SMBIOS_SIZE))
 			printk(BIOS_ERR, "ERROR: Increase SMBIOS size\n");
 		printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n",
diff --git a/src/arch/x86/thread.c b/src/arch/x86/thread.c
index 993577d..0a11141 100644
--- a/src/arch/x86/thread.c
+++ b/src/arch/x86/thread.c
@@ -38,7 +38,7 @@
 }
 
 void arch_prepare_thread(struct thread *t,
-                         void asmlinkage (*thread_entry)(void *), void *arg)
+			asmlinkage void (*thread_entry)(void *), void *arg)
 {
 	uintptr_t stack = t->stack_current;
 

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Gerrit-MessageType: newchange
Gerrit-Change-Id: I2d7e1a329c6b2e8ca9633a97b595566544d7fd33
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Lee Leahy <leroy.p.leahy at intel.com>



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