[coreboot-gerrit] Change in coreboot[master]: google/poppy: Use rt5663 interrupt as GpioInt instead of PIRQ

[gerrit code review]

>From Duncan Laurie <dlaurie at chromium.org>:

Duncan Laurie has submitted this change and it was merged. ( https://review.coreboot.org/18853 )

Change subject: google/poppy: Use rt5663 interrupt as GpioInt instead of PIRQ
......................................................................


google/poppy: Use rt5663 interrupt as GpioInt instead of PIRQ

The kernel driver for rt5663 expects to get an interrupt on both
a rising and falling edge, and using a legacy interrupt doesn't
provide that flexibility.

Instead configure this pin as a GPIO and use the interrupt through
the GPIO controller.  This allows using GpioInt() with ActiveBoth
setting and results in correct operation of the headset jack.

This is a clone of Duncan's patch for eve
at I6f181ec560fe9d34efc023ef6e78e33cb0b4c529

BUG=none
BRANCH=none
TEST=test on poppy that headset jack detect is read properly at
boot, and that plugging in and removing both generate a single
interrupt event in the driver.

Change-Id: I4aaa4164cb277a98ab5d5f033632f5e16bfb779e
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://review.coreboot.org/18853
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
M src/mainboard/google/poppy/devicetree.cb
M src/mainboard/google/poppy/gpio.h
2 files changed, 2 insertions(+), 3 deletions(-)

Approvals:
  Aaron Durbin: Looks good to me, approved
  build bot (Jenkins): Verified



diff --git a/src/mainboard/google/poppy/devicetree.cb b/src/mainboard/google/poppy/devicetree.cb
index bdf16e6..fc63967 100644
--- a/src/mainboard/google/poppy/devicetree.cb
+++ b/src/mainboard/google/poppy/devicetree.cb
@@ -234,7 +234,7 @@
 				register "hid" = ""10EC5663""
 				register "name" = ""RT53""
 				register "desc" = ""Realtek RT5663""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)"
+				register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)"
 				register "probed" = "1"
 				device i2c 13 on end
 			end
diff --git a/src/mainboard/google/poppy/gpio.h b/src/mainboard/google/poppy/gpio.h
index e83ff81..bd452af 100644
--- a/src/mainboard/google/poppy/gpio.h
+++ b/src/mainboard/google/poppy/gpio.h
@@ -129,8 +129,7 @@
 				NF1), /* ISH_SENSOR */
 /* ISH_I2C1_SDA */	PAD_CFG_NC(GPP_D7),
 /* ISH_I2C1_SCL */	PAD_CFG_NC(GPP_D8),
-/* ISH_SPI_CS# */	PAD_CFG_GPI_APIC(GPP_D9, NONE,
-					PLTRST), /* HP_IRQ_GPIO */
+/* ISH_SPI_CS# */	PAD_CFG_GPI(GPP_D9, NONE, PLTRST), /* HP_IRQ_GPIO */
 /* ISH_SPI_CLK */	PAD_CFG_GPO(GPP_D10, 1, DEEP), /* SPKR_RST_L */
 /* ISH_SPI_MISO */	PAD_CFG_GPI_APIC(GPP_D11, NONE,
 					PLTRST), /* SPKR_INT_L */

-- 
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Gerrit-MessageType: merged
Gerrit-Change-Id: I4aaa4164cb277a98ab5d5f033632f5e16bfb779e
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Naresh Solanki <naresh.solanki at intel.com>
Gerrit-Reviewer: build bot (Jenkins)