[coreboot-gerrit] Change in coreboot[master]: google/eve: Use rt5663 interrupt as GpioInt instead of PIRQ

gerrit code review gerrit at coreboot.org
Thu Mar 16 16:25:20 CET 2017


>From Duncan Laurie <dlaurie at chromium.org>:

Duncan Laurie has submitted this change and it was merged. ( https://review.coreboot.org/18836 )

Change subject: google/eve: Use rt5663 interrupt as GpioInt instead of PIRQ
......................................................................


google/eve: Use rt5663 interrupt as GpioInt instead of PIRQ

The kernel driver for rt5663 expects to get an interrupt on both
a rising and falling edge, and using a legacy interrupt doesn't
provide that flexibility.

Instead configure this pin as a GPIO and use the interrupt through
the GPIO controller.  This allows using GpioInt() with ActiveBoth
setting and results in correct operation of the headset jack.

BUG=b:35585307
BRANCH=none
TEST=test on Eve that headset jack detect is read properly at
boot, and that plugging in and removing both generate a single
interrupt event in the driver.

Change-Id: I6f181ec560fe9d34efc023ef6e78e33cb0b4c529
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://review.coreboot.org/18836
Reviewed-by: Furquan Shaikh <furquan at google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
M src/mainboard/google/eve/devicetree.cb
M src/mainboard/google/eve/gpio.h
2 files changed, 2 insertions(+), 2 deletions(-)

Approvals:
  Aaron Durbin: Looks good to me, approved
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved



diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb
index 76ef17c..d8f6362 100644
--- a/src/mainboard/google/eve/devicetree.cb
+++ b/src/mainboard/google/eve/devicetree.cb
@@ -274,7 +274,7 @@
 				register "hid" = ""10EC5663""
 				register "name" = ""RT53""
 				register "desc" = ""Realtek RT5663""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)"
+				register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)"
 				register "probed" = "1"
 				device i2c 13 on end
 			end
diff --git a/src/mainboard/google/eve/gpio.h b/src/mainboard/google/eve/gpio.h
index d72b492..43f2f62 100644
--- a/src/mainboard/google/eve/gpio.h
+++ b/src/mainboard/google/eve/gpio.h
@@ -129,7 +129,7 @@
 /* ISH_I2C0_SCL */	PAD_CFG_NC(GPP_D6),
 /* ISH_I2C1_SDA */	PAD_CFG_NC(GPP_D7),
 /* ISH_I2C1_SCL */	PAD_CFG_NC(GPP_D8),
-/* ISH_SPI_CS# */	PAD_CFG_GPI_APIC(GPP_D9, NONE, PLTRST), /* HP_IRQ_GPIO */
+/* ISH_SPI_CS# */	PAD_CFG_GPI(GPP_D9, NONE, PLTRST), /* HP_IRQ_GPIO */
 /* ISH_SPI_CLK */	PAD_CFG_GPO(GPP_D10, 1, DEEP), /* SPKR_RST_L */
 /* ISH_SPI_MISO */	PAD_CFG_GPI_APIC(GPP_D11, NONE, PLTRST), /* SPKR_INT_L */
 /* ISH_SPI_MOSI */	PAD_CFG_TERM_GPO(GPP_D12, 1, 20K_PU, DEEP), /* EN_PP3300_DX_CAM */

-- 
To view, visit https://review.coreboot.org/18836
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: merged
Gerrit-Change-Id: I6f181ec560fe9d34efc023ef6e78e33cb0b4c529
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: build bot (Jenkins)



More information about the coreboot-gerrit mailing list