[coreboot-gerrit] New patch to review for coreboot: src/include: Fix indent for case labels

[Lee Leahy (leroy.p.leahy@intel.com)]

Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18683

-gerrit

commit 21c20f428b030b3bd22be5876046bb1e1e906215
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Wed Mar 8 10:05:16 2017 -0800

    src/include: Fix indent for case labels
    
    Fix the following error detected by checkpatch.pl:
    
    ERROR: switch and case should be at the same indent
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: I92f00254c7fcb79a5ecd4ba5e19a757cfe5c11fa
    Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
---
 src/include/cpu/x86/lapic.h | 36 ++++++++++++++++++------------------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index 540e985..7e3a96d 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -80,24 +80,24 @@ struct __xchg_dummy { unsigned long a[100]; };
 static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
 {
 	switch (size) {
-		case 1:
-			__asm__ __volatile__("xchgb %b0,%1"
-				:"=q" (x)
-				:"m" (*__xg(ptr)), "0" (x)
-				:"memory");
-			break;
-		case 2:
-			__asm__ __volatile__("xchgw %w0,%1"
-				:"=r" (x)
-				:"m" (*__xg(ptr)), "0" (x)
-				:"memory");
-			break;
-		case 4:
-			__asm__ __volatile__("xchgl %0,%1"
-				:"=r" (x)
-				:"m" (*__xg(ptr)), "0" (x)
-				:"memory");
-			break;
+	case 1:
+		__asm__ __volatile__("xchgb %b0,%1"
+			:"=q" (x)
+			:"m" (*__xg(ptr)), "0" (x)
+			:"memory");
+		break;
+	case 2:
+		__asm__ __volatile__("xchgw %w0,%1"
+			:"=r" (x)
+			:"m" (*__xg(ptr)), "0" (x)
+			:"memory");
+		break;
+	case 4:
+		__asm__ __volatile__("xchgl %0,%1"
+			:"=r" (x)
+			:"m" (*__xg(ptr)), "0" (x)
+			:"memory");
+		break;
 	}
 	return x;
 }