[coreboot-gerrit] New patch to review for coreboot: intel/skylake: Filter suspend well power failure event for Deep Sx

[Duncan Laurie (dlaurie@chromium.org)]

Duncan Laurie (dlaurie at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18664

-gerrit

commit 8e33d3157c70a4b01dd1b323a70f2617f77506eb
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Mar 7 19:22:24 2017 -0800

    intel/skylake: Filter suspend well power failure event for Deep Sx
    
    If Deep Sx is enabled the event log will get entries added on every
    power sequence transition indicating that the suspend well has failed.
    
    When a board is using Deep Sx by design this is intended behavior and
    just fills the logs with extraneous events.
    
    To make this work the device init state has to be executed first so it
    actually enables the Deep Sx policies in the SOC since this code does
    not have any hooks back into the devicetree to read the intended setting
    from there.
    
    BUG=b:36042662
    BRANCH=none
    TEST=Perform suspend/resume on Eve device with Deep S3 enabled, and
    then check the event log to be sure that it does not contain the
    "SUS Power Fail" event.
    
    Change-Id: I3c8242baa63685232025e1dfef5595ec0ec6d14a
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/soc/intel/skylake/elog.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c
index 8d5d4fe..562df08 100644
--- a/src/soc/intel/skylake/elog.c
+++ b/src/soc/intel/skylake/elog.c
@@ -79,8 +79,12 @@ static void pch_log_power_and_resets(struct chipset_power_state *ps)
 		elog_add_event(ELOG_TYPE_POWER_FAIL);
 
 	/* SUS Well Power Failure */
-	if (ps->gen_pmcon_b & SUS_PWR_FLR)
-		elog_add_event(ELOG_TYPE_SUS_POWER_FAIL);
+	if (ps->gen_pmcon_b & SUS_PWR_FLR) {
+		/* Do not log SUS_PWR_FLR if waking from deep Sx */
+		if (!(ps->prev_sleep_state == ACPI_S3 && deep_s3_enabled()) &&
+		    !(ps->prev_sleep_state == ACPI_S5 && deep_s5_enabled()))
+			elog_add_event(ELOG_TYPE_SUS_POWER_FAIL);
+	}
 
 	/* TCO Timeout */
 	if (ps->prev_sleep_state != ACPI_S3 &&
@@ -122,4 +126,4 @@ static void pch_log_state(void *unused)
 		pch_log_wake_source(ps);
 }
 
-BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, pch_log_state, NULL);
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, pch_log_state, NULL);