[coreboot-gerrit] Change in coreboot[master]: src/device: add IS_ENABLED() around Kconfig symbol references
Martin Roth (Code Review)
gerrit at coreboot.org
Sun Jun 25 21:05:45 CEST 2017
Martin Roth has uploaded this change for review. ( https://review.coreboot.org/20338
Change subject: src/device: add IS_ENABLED() around Kconfig symbol references
......................................................................
src/device: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: I66cde1adcf373889b03f144793c0b4f46d21ca31
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/device/device.c
M src/device/oprom/realmode/x86.c
M src/device/oprom/realmode/x86_interrupts.c
M src/device/pci_device.c
M src/device/pci_early.c
M src/device/pci_rom.c
6 files changed, 23 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/20338/1
diff --git a/src/device/device.c b/src/device/device.c
index 0231ec7..35f5909 100644
--- a/src/device/device.c
+++ b/src/device/device.c
@@ -46,7 +46,7 @@
#include <stdlib.h>
#include <string.h>
#include <smp/spinlock.h>
-#if CONFIG_ARCH_X86
+#if IS_ENABLED(CONFIG_ARCH_X86)
#include <arch/ebda.h>
#endif
#include <timer.h>
@@ -102,7 +102,7 @@
DECLARE_SPIN_LOCK(dev_lock)
-#if CONFIG_GFXUMA
+#if IS_ENABLED(CONFIG_GFXUMA)
/* IGD UMA memory */
uint64_t uma_memory_base = 0;
uint64_t uma_memory_size = 0;
@@ -1130,7 +1130,7 @@
return;
if (!dev->initialized && dev->ops && dev->ops->init) {
-#if CONFIG_HAVE_MONOTONIC_TIMER
+#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER)
struct stopwatch sw;
stopwatch_init(&sw);
#endif
@@ -1142,7 +1142,7 @@
printk(BIOS_DEBUG, "%s init ...\n", dev_path(dev));
dev->initialized = 1;
dev->ops->init(dev);
-#if CONFIG_HAVE_MONOTONIC_TIMER
+#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER)
printk(BIOS_DEBUG, "%s init finished in %ld usecs\n", dev_path(dev),
stopwatch_duration_usecs(&sw));
#endif
@@ -1178,7 +1178,7 @@
printk(BIOS_INFO, "Initializing devices...\n");
-#if CONFIG_ARCH_X86
+#if IS_ENABLED(CONFIG_ARCH_X86)
/* Ensure EBDA is prepared before Option ROMs. */
setup_default_ebda();
#endif
diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c
index 69ac1fe..d9fac36 100644
--- a/src/device/oprom/realmode/x86.c
+++ b/src/device/oprom/realmode/x86.c
@@ -212,7 +212,7 @@
write_idt_stub((void *)0xffe6e, 0x1a);
}
-#if CONFIG_FRAMEBUFFER_SET_VESA_MODE
+#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
vbe_mode_info_t mode_info;
static int mode_info_valid;
@@ -268,7 +268,7 @@
}
vbe_set_mode(&mode_info);
-#if CONFIG_BOOTSPLASH
+#if IS_ENABLED(CONFIG_BOOTSPLASH)
struct jpeg_decdata *decdata;
unsigned char *jpeg = cbfs_boot_map_with_leak("bootsplash.jpg",
CBFS_TYPE_BOOTSPLASH,
@@ -349,13 +349,13 @@
realmode_call(addr + 0x0003, num_dev, 0xffff, 0x0000, 0xffff, 0x0, 0x0);
printk(BIOS_DEBUG, "... Option ROM returned.\n");
-#if CONFIG_FRAMEBUFFER_SET_VESA_MODE
+#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
if ((dev->class >> 8)== PCI_CLASS_DISPLAY_VGA)
vbe_set_graphics();
#endif
}
-#if CONFIG_GEODE_VSA
+#if IS_ENABLED(CONFIG_GEODE_VSA)
#define VSA2_BUFFER 0x60000
#define VSA2_ENTRY_POINT 0x60020
@@ -459,7 +459,7 @@
cs = cs_ip >> 16;
flags = stackflags;
-#if CONFIG_REALMODE_DEBUG
+#if IS_ENABLED(CONFIG_REALMODE_DEBUG)
printk(BIOS_DEBUG, "oprom: INT# 0x%x\n", intnumber);
printk(BIOS_DEBUG, "oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n",
eax, ebx, ecx, edx);
diff --git a/src/device/oprom/realmode/x86_interrupts.c b/src/device/oprom/realmode/x86_interrupts.c
index 05cdd4a..7ec77f8 100644
--- a/src/device/oprom/realmode/x86_interrupts.c
+++ b/src/device/oprom/realmode/x86_interrupts.c
@@ -212,7 +212,7 @@
break;
}
-#if CONFIG_REALMODE_DEBUG
+#if IS_ENABLED(CONFIG_REALMODE_DEBUG)
printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n",
func, bus, devfn, reg, X86_ECX);
#endif
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index e423151..75e9a79 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -664,7 +664,7 @@
((device & 0xffff) << 16) | (vendor & 0xffff));
}
-#if CONFIG_VGA_ROM_RUN
+#if IS_ENABLED(CONFIG_VGA_ROM_RUN)
static int should_run_oprom(struct device *dev)
{
static int should_run = -1;
@@ -677,7 +677,7 @@
*/
should_run = display_init_required();
-#if CONFIG_CHROMEOS
+#if IS_ENABLED(CONFIG_CHROMEOS)
if (!should_run)
should_run = vboot_wants_oprom();
#endif
@@ -706,7 +706,7 @@
/** Default handler: only runs the relevant PCI BIOS. */
void pci_dev_init(struct device *dev)
{
-#if CONFIG_VGA_ROM_RUN
+#if IS_ENABLED(CONFIG_VGA_ROM_RUN)
struct rom_header *rom, *ram;
/* Only execute VGA ROMs. */
@@ -783,7 +783,7 @@
*/
static struct device_operations *get_pci_bridge_ops(device_t dev)
{
-#if CONFIG_PCIX_PLUGIN_SUPPORT
+#if IS_ENABLED(CONFIG_PCIX_PLUGIN_SUPPORT)
unsigned int pcixpos;
pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
if (pcixpos) {
@@ -791,7 +791,7 @@
return &default_pcix_ops_bus;
}
#endif
-#if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
+#if IS_ENABLED(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT)
unsigned int htpos = 0;
while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) {
u16 flags;
@@ -804,7 +804,7 @@
}
}
#endif
-#if CONFIG_PCIEXP_PLUGIN_SUPPORT
+#if IS_ENABLED(CONFIG_PCIEXP_PLUGIN_SUPPORT)
unsigned int pciexpos;
pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE);
if (pciexpos) {
@@ -894,7 +894,7 @@
goto bad;
dev->ops = get_pci_bridge_ops(dev);
break;
-#if CONFIG_CARDBUS_PLUGIN_SUPPORT
+#if IS_ENABLED(CONFIG_CARDBUS_PLUGIN_SUPPORT)
case PCI_HEADER_TYPE_CARDBUS:
dev->ops = &default_cardbus_ops_bus;
break;
@@ -1445,7 +1445,7 @@
return target_pin;
}
-#if CONFIG_PC80_SYSTEM
+#if IS_ENABLED(CONFIG_PC80_SYSTEM)
/**
* Assign IRQ numbers.
*
@@ -1494,7 +1494,7 @@
printk(BIOS_DEBUG, " Readback = %d\n", irq);
#endif
-#if CONFIG_PC80_SYSTEM
+#if IS_ENABLED(CONFIG_PC80_SYSTEM)
/* Change to level triggered. */
i8259_configure_irq_trigger(pIntAtoD[line - 1],
IRQ_LEVEL_TRIGGERED);
diff --git a/src/device/pci_early.c b/src/device/pci_early.c
index 7107738..6baebe0 100644
--- a/src/device/pci_early.c
+++ b/src/device/pci_early.c
@@ -71,7 +71,7 @@
#endif /* __PRE_RAM__ */
-#if CONFIG_EARLY_PCI_BRIDGE
+#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE)
static void pci_bridge_reset_secondary(device_t p2p_bridge)
{
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index a3f5775..6456d17 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -63,7 +63,7 @@
rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);
if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
-#if CONFIG_BOARD_EMULATION_QEMU_X86
+#if IS_ENABLED(CONFIG_BOARD_EMULATION_QEMU_X86)
if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
rom_address = 0xc0000;
else
@@ -149,7 +149,7 @@
* devices have a mismatch between the hardware and the ROM.
*/
if (PCI_CLASS_DISPLAY_VGA == (dev->class >> 8)) {
-#if !CONFIG_MULTIPLE_VGA_ADAPTERS
+#if !IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
extern device_t vga_pri; /* Primary VGA device (device.c). */
if (dev != vga_pri) return NULL; /* Only one VGA supported. */
#endif
--
To view, visit https://review.coreboot.org/20338
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I66cde1adcf373889b03f144793c0b4f46d21ca31
Gerrit-Change-Number: 20338
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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