<p>Martin Roth has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20338">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/device: add IS_ENABLED() around Kconfig symbol references<br><br>Some of these can be changed from #if to if(), but that will happen<br>in a follow-on commmit.<br><br>Change-Id: I66cde1adcf373889b03f144793c0b4f46d21ca31<br>Signed-off-by: Martin Roth <martinroth@google.com><br>---<br>M src/device/device.c<br>M src/device/oprom/realmode/x86.c<br>M src/device/oprom/realmode/x86_interrupts.c<br>M src/device/pci_device.c<br>M src/device/pci_early.c<br>M src/device/pci_rom.c<br>6 files changed, 23 insertions(+), 23 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/20338/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/device/device.c b/src/device/device.c<br>index 0231ec7..35f5909 100644<br>--- a/src/device/device.c<br>+++ b/src/device/device.c<br>@@ -46,7 +46,7 @@<br> #include <stdlib.h><br> #include <string.h><br> #include <smp/spinlock.h><br>-#if CONFIG_ARCH_X86<br>+#if IS_ENABLED(CONFIG_ARCH_X86)<br> #include <arch/ebda.h><br> #endif<br> #include <timer.h><br>@@ -102,7 +102,7 @@<br> <br> DECLARE_SPIN_LOCK(dev_lock)<br> <br>-#if CONFIG_GFXUMA<br>+#if IS_ENABLED(CONFIG_GFXUMA)<br> /* IGD UMA memory */<br> uint64_t uma_memory_base = 0;<br> uint64_t uma_memory_size = 0;<br>@@ -1130,7 +1130,7 @@<br> return;<br> <br> if (!dev->initialized && dev->ops && dev->ops->init) {<br>-#if CONFIG_HAVE_MONOTONIC_TIMER<br>+#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER)<br> struct stopwatch sw;<br> stopwatch_init(&sw);<br> #endif<br>@@ -1142,7 +1142,7 @@<br> printk(BIOS_DEBUG, "%s init ...\n", dev_path(dev));<br> dev->initialized = 1;<br> dev->ops->init(dev);<br>-#if CONFIG_HAVE_MONOTONIC_TIMER<br>+#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER)<br> printk(BIOS_DEBUG, "%s init finished in %ld usecs\n", dev_path(dev),<br> stopwatch_duration_usecs(&sw));<br> #endif<br>@@ -1178,7 +1178,7 @@<br> <br> printk(BIOS_INFO, "Initializing devices...\n");<br> <br>-#if CONFIG_ARCH_X86<br>+#if IS_ENABLED(CONFIG_ARCH_X86)<br> /* Ensure EBDA is prepared before Option ROMs. */<br> setup_default_ebda();<br> #endif<br>diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c<br>index 69ac1fe..d9fac36 100644<br>--- a/src/device/oprom/realmode/x86.c<br>+++ b/src/device/oprom/realmode/x86.c<br>@@ -212,7 +212,7 @@<br> write_idt_stub((void *)0xffe6e, 0x1a);<br> }<br> <br>-#if CONFIG_FRAMEBUFFER_SET_VESA_MODE<br>+#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)<br> vbe_mode_info_t mode_info;<br> static int mode_info_valid;<br> <br>@@ -268,7 +268,7 @@<br> }<br> <br> vbe_set_mode(&mode_info);<br>-#if CONFIG_BOOTSPLASH<br>+#if IS_ENABLED(CONFIG_BOOTSPLASH)<br> struct jpeg_decdata *decdata;<br> unsigned char *jpeg = cbfs_boot_map_with_leak("bootsplash.jpg",<br> CBFS_TYPE_BOOTSPLASH,<br>@@ -349,13 +349,13 @@<br> realmode_call(addr + 0x0003, num_dev, 0xffff, 0x0000, 0xffff, 0x0, 0x0);<br> printk(BIOS_DEBUG, "... Option ROM returned.\n");<br> <br>-#if CONFIG_FRAMEBUFFER_SET_VESA_MODE<br>+#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)<br> if ((dev->class >> 8)== PCI_CLASS_DISPLAY_VGA)<br> vbe_set_graphics();<br> #endif<br> }<br> <br>-#if CONFIG_GEODE_VSA<br>+#if IS_ENABLED(CONFIG_GEODE_VSA)<br> <br> #define VSA2_BUFFER 0x60000<br> #define VSA2_ENTRY_POINT 0x60020<br>@@ -459,7 +459,7 @@<br> cs = cs_ip >> 16;<br> flags = stackflags;<br> <br>-#if CONFIG_REALMODE_DEBUG<br>+#if IS_ENABLED(CONFIG_REALMODE_DEBUG)<br> printk(BIOS_DEBUG, "oprom: INT# 0x%x\n", intnumber);<br> printk(BIOS_DEBUG, "oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n",<br> eax, ebx, ecx, edx);<br>diff --git a/src/device/oprom/realmode/x86_interrupts.c b/src/device/oprom/realmode/x86_interrupts.c<br>index 05cdd4a..7ec77f8 100644<br>--- a/src/device/oprom/realmode/x86_interrupts.c<br>+++ b/src/device/oprom/realmode/x86_interrupts.c<br>@@ -212,7 +212,7 @@<br> break;<br> }<br> <br>-#if CONFIG_REALMODE_DEBUG<br>+#if IS_ENABLED(CONFIG_REALMODE_DEBUG)<br> printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n",<br> func, bus, devfn, reg, X86_ECX);<br> #endif<br>diff --git a/src/device/pci_device.c b/src/device/pci_device.c<br>index e423151..75e9a79 100644<br>--- a/src/device/pci_device.c<br>+++ b/src/device/pci_device.c<br>@@ -664,7 +664,7 @@<br> ((device & 0xffff) << 16) | (vendor & 0xffff));<br> }<br> <br>-#if CONFIG_VGA_ROM_RUN<br>+#if IS_ENABLED(CONFIG_VGA_ROM_RUN)<br> static int should_run_oprom(struct device *dev)<br> {<br> static int should_run = -1;<br>@@ -677,7 +677,7 @@<br> */<br> should_run = display_init_required();<br> <br>-#if CONFIG_CHROMEOS<br>+#if IS_ENABLED(CONFIG_CHROMEOS)<br> if (!should_run)<br> should_run = vboot_wants_oprom();<br> #endif<br>@@ -706,7 +706,7 @@<br> /** Default handler: only runs the relevant PCI BIOS. */<br> void pci_dev_init(struct device *dev)<br> {<br>-#if CONFIG_VGA_ROM_RUN<br>+#if IS_ENABLED(CONFIG_VGA_ROM_RUN)<br> struct rom_header *rom, *ram;<br> <br> /* Only execute VGA ROMs. */<br>@@ -783,7 +783,7 @@<br> */<br> static struct device_operations *get_pci_bridge_ops(device_t dev)<br> {<br>-#if CONFIG_PCIX_PLUGIN_SUPPORT<br>+#if IS_ENABLED(CONFIG_PCIX_PLUGIN_SUPPORT)<br> unsigned int pcixpos;<br> pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX);<br> if (pcixpos) {<br>@@ -791,7 +791,7 @@<br> return &default_pcix_ops_bus;<br> }<br> #endif<br>-#if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT<br>+#if IS_ENABLED(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT)<br> unsigned int htpos = 0;<br> while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) {<br> u16 flags;<br>@@ -804,7 +804,7 @@<br> }<br> }<br> #endif<br>-#if CONFIG_PCIEXP_PLUGIN_SUPPORT<br>+#if IS_ENABLED(CONFIG_PCIEXP_PLUGIN_SUPPORT)<br> unsigned int pciexpos;<br> pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE);<br> if (pciexpos) {<br>@@ -894,7 +894,7 @@<br> goto bad;<br> dev->ops = get_pci_bridge_ops(dev);<br> break;<br>-#if CONFIG_CARDBUS_PLUGIN_SUPPORT<br>+#if IS_ENABLED(CONFIG_CARDBUS_PLUGIN_SUPPORT)<br> case PCI_HEADER_TYPE_CARDBUS:<br> dev->ops = &default_cardbus_ops_bus;<br> break;<br>@@ -1445,7 +1445,7 @@<br> return target_pin;<br> }<br> <br>-#if CONFIG_PC80_SYSTEM<br>+#if IS_ENABLED(CONFIG_PC80_SYSTEM)<br> /**<br> * Assign IRQ numbers.<br> *<br>@@ -1494,7 +1494,7 @@<br> printk(BIOS_DEBUG, " Readback = %d\n", irq);<br> #endif<br> <br>-#if CONFIG_PC80_SYSTEM<br>+#if IS_ENABLED(CONFIG_PC80_SYSTEM)<br> /* Change to level triggered. */<br> i8259_configure_irq_trigger(pIntAtoD[line - 1],<br> IRQ_LEVEL_TRIGGERED);<br>diff --git a/src/device/pci_early.c b/src/device/pci_early.c<br>index 7107738..6baebe0 100644<br>--- a/src/device/pci_early.c<br>+++ b/src/device/pci_early.c<br>@@ -71,7 +71,7 @@<br> #endif /* __PRE_RAM__ */<br> <br> <br>-#if CONFIG_EARLY_PCI_BRIDGE<br>+#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE)<br> <br> static void pci_bridge_reset_secondary(device_t p2p_bridge)<br> {<br>diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c<br>index a3f5775..6456d17 100644<br>--- a/src/device/pci_rom.c<br>+++ b/src/device/pci_rom.c<br>@@ -63,7 +63,7 @@<br> rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);<br> <br> if (rom_address == 0x00000000 || rom_address == 0xffffffff) {<br>-#if CONFIG_BOARD_EMULATION_QEMU_X86<br>+#if IS_ENABLED(CONFIG_BOARD_EMULATION_QEMU_X86)<br> if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)<br> rom_address = 0xc0000;<br> else<br>@@ -149,7 +149,7 @@<br> * devices have a mismatch between the hardware and the ROM.<br> */<br> if (PCI_CLASS_DISPLAY_VGA == (dev->class >> 8)) {<br>-#if !CONFIG_MULTIPLE_VGA_ADAPTERS<br>+#if !IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)<br> extern device_t vga_pri; /* Primary VGA device (device.c). */<br> if (dev != vga_pri) return NULL; /* Only one VGA supported. */<br> #endif<br></pre><p>To view, visit <a href="https://review.coreboot.org/20338">change 20338</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20338"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I66cde1adcf373889b03f144793c0b4f46d21ca31 </div>
<div style="display:none"> Gerrit-Change-Number: 20338 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Martin Roth <martinroth@google.com> </div>