[coreboot-gerrit] Change in coreboot[master]: mainboard/google/fizz: Add audio devices

Kevin Cheng (Code Review) gerrit at coreboot.org
Thu Jun 22 11:40:38 CEST 2017


Kevin Cheng has uploaded this change for review. ( https://review.coreboot.org/20305


Change subject: mainboard/google/fizz: Add audio devices
......................................................................

mainboard/google/fizz: Add audio devices

- Describe RT5663 headphone codec in ACPI so it can
be enumerated by the OS.

- Supply NHLT binaries for RT5663

BUT=b:62872377
TEST=Apply full patch set and UCM, verify basic audio works.

Signed-off-by: Kevin Cheng <kevin.cheng at intel.com>
Change-Id: I5bbd58b0e660cdf5089e6a6dd35a757ecf8ec076
---
M src/mainboard/google/fizz/Kconfig
M src/mainboard/google/fizz/devicetree.cb
M src/mainboard/google/fizz/gpio.h
M src/mainboard/google/fizz/mainboard.c
4 files changed, 45 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/20305/1

diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig
index e15d229..107af9a 100644
--- a/src/mainboard/google/fizz/Kconfig
+++ b/src/mainboard/google/fizz/Kconfig
@@ -83,4 +83,8 @@
 	int
 	default 64  # GPE0_DW2_00 (GPP_E0)
 
+config INCLUDE_NHLT_BLOBS
+	bool "Include blobs for audio."
+	select NHLT_RT5663
+
 endif
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index f1d2b77..a493de5 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -245,6 +245,13 @@
 		device pci 17.0 on end # SATA
 		device pci 19.0 on  end # UART #2
 		device pci 19.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""10EC5663""
+				register "name" = ""RT53""
+				register "desc" = ""Realtek RT5663""
+				register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)"
+				device i2c 13 on end
+			end
 		end # I2C #5
 		device pci 19.2 off  end # I2C #4
 		device pci 1c.0 on end # PCI Express Port 1
diff --git a/src/mainboard/google/fizz/gpio.h b/src/mainboard/google/fizz/gpio.h
index 56324b5..13081ec 100644
--- a/src/mainboard/google/fizz/gpio.h
+++ b/src/mainboard/google/fizz/gpio.h
@@ -143,8 +143,8 @@
 /* ISH_I2C0_SCL */	PAD_CFG_NC(GPP_D6),
 /* ISH_I2C1_SDA */	PAD_CFG_NC(GPP_D7),
 /* ISH_I2C1_SCL */	PAD_CFG_NC(GPP_D8),
-/* ISH_SPI_CS# */	PAD_CFG_GPI_APIC(GPP_D9, NONE,
-					PLTRST), /* HP_IRQ_GPIO */
+/* ISH_SPI_CS# */	PAD_CFG_GPI_INT(GPP_D9, NONE,
+					PLTRST, EDGE), /* HP_IRQ_GPIO */
 /* ISH_SPI_CLK */	PAD_CFG_NC(GPP_D10),
 /* ISH_SPI_MISO */	PAD_CFG_NC(GPP_D11),
 /* ISH_SPI_MOSI */	PAD_CFG_NC(GPP_D12),
diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c
index 1f6dc87c..a925f08 100644
--- a/src/mainboard/google/fizz/mainboard.c
+++ b/src/mainboard/google/fizz/mainboard.c
@@ -18,11 +18,41 @@
 #include <device/device.h>
 #include <ec/ec.h>
 #include <soc/pci_devs.h>
+#include <soc/nhlt.h>
 #include <vendorcode/google/chromeos/chromeos.h>
+
+static const char *oem_id = "GOOGLE";
+static const char *oem_table_id = "FIZZ";
 
 static void mainboard_init(device_t dev)
 {
 	mainboard_ec_init();
+}
+
+static unsigned long mainboard_write_acpi_tables(
+	device_t device, unsigned long current, acpi_rsdp_t *rsdp)
+{
+	uintptr_t start_addr;
+	uintptr_t end_addr;
+	struct nhlt *nhlt;
+
+	start_addr = current;
+
+	nhlt = nhlt_init();
+	if (!nhlt)
+		return start_addr;
+
+	/* RT5663 Headset codec */
+	if (nhlt_soc_add_rt5663(nhlt, AUDIO_LINK_SSP1))
+		printk(BIOS_ERR, "Couldn't add headset codec.\n");
+
+	end_addr = nhlt_soc_serialize_oem_overrides(nhlt, start_addr,
+				oem_id, oem_table_id, 0);
+
+	if (end_addr != start_addr)
+		acpi_add_table(rsdp, (void *)start_addr);
+
+	return end_addr;
 }
 
 static void mainboard_enable(device_t dev)
@@ -44,6 +74,8 @@
 		if (tpm)
 			tpm->enabled = 0;
 	}
+
+	dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
 }
 
 struct chip_operations mainboard_ops = {

-- 
To view, visit https://review.coreboot.org/20305
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5bbd58b0e660cdf5089e6a6dd35a757ecf8ec076
Gerrit-Change-Number: 20305
Gerrit-PatchSet: 1
Gerrit-Owner: Kevin Cheng <kevin.cheng at intel.com>
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