[coreboot-gerrit] Change in coreboot[master]: nb/intel/common/gma_opregion: Use new method to update ASLS

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20283


Change subject: nb/intel/common/gma_opregion: Use new method to update ASLS
......................................................................

nb/intel/common/gma_opregion: Use new method to update ASLS

Use new GMA driver method to set ASLS.

Change-Id: I872ff86a778497df76ad7f9b1b6910c4e7c5941f
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/northbridge/intel/common/gma_opregion.c
1 file changed, 1 insertion(+), 13 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/20283/1

diff --git a/src/northbridge/intel/common/gma_opregion.c b/src/northbridge/intel/common/gma_opregion.c
index 7d4c3f1..f6e05b9 100644
--- a/src/northbridge/intel/common/gma_opregion.c
+++ b/src/northbridge/intel/common/gma_opregion.c
@@ -79,8 +79,6 @@
 enum cb_err init_igd_opregion(igd_opregion_t *opregion)
 {
 	enum cb_err ret;
-	device_t igd;
-	u16 reg16;
 
 	memset((void *)opregion, 0, sizeof(igd_opregion_t));
 
@@ -119,17 +117,7 @@
 	if (ret != CB_SUCCESS)
 		return ret;
 
-	/* TODO This needs to happen in S3 resume, too.
-	 * Maybe it should move to the finalize handler
-	 */
-	igd = dev_find_slot(0, PCI_DEVFN(0x2, 0));
-	pci_write_config32(igd, ASLS, (u32)opregion);
-
-	/* Intel's Windows driver relies on this: */
-	reg16 = pci_read_config16(igd, SWSCI);
-	reg16 &= ~GSSCIE;
-	reg16 |= SMISCISEL;
-	pci_write_config16(igd, SWSCI, reg16);
+	intel_gma_opregion_register((uintptr_t)opregion);
 
 	return CB_SUCCESS;
 }

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I872ff86a778497df76ad7f9b1b6910c4e7c5941f
Gerrit-Change-Number: 20283
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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