[coreboot-gerrit] Change in coreboot[master]: haswell: add CBMEM_MEMINFO table when initing RAM

[Matt DeVillier (Code Review)]

Hello Philippe Mathieu-Daudé, build bot (Jenkins), Martin Roth, 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/19958

to look at the new patch set (#3).

Change subject: haswell: add CBMEM_MEMINFO table when initing RAM
......................................................................

haswell: add CBMEM_MEMINFO table when initing RAM

Populate a memory_info struct with PEI and SPD data,
in order to inject the CBMEM_INFO table necessary to
populate a type17 SMBIOS table.

On Broadwell, this is done by the MRC binary, but the older
Haswell MRC binary doesn't populate the pei_data struct with
all the info needed, so we have to pull it from the SPD.

Some values are hardcoded  based on platform specifications.

Change-Id: Iea837d23f2c9c1c943e0db28cf81b265f054e9d1
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/cpu/intel/haswell/romstage.c
M src/include/device/dram/ddr3.h
M src/northbridge/intel/haswell/raminit.c
M src/northbridge/intel/haswell/raminit.h
4 files changed, 94 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/19958/3
-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Iea837d23f2c9c1c943e0db28cf81b265f054e9d1
Gerrit-Change-Number: 19958
Gerrit-PatchSet: 3
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude at gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>