[coreboot-gerrit] Change in coreboot[master]: src/soc: Add guards on header files
Martin Roth (Code Review)
gerrit at coreboot.org
Mon Jul 24 15:30:39 CEST 2017
Martin Roth has uploaded this change for review. ( https://review.coreboot.org/20748
Change subject: src/soc: Add guards on header files
......................................................................
src/soc: Add guards on header files
Note that the irq_helper.h files are designed to be included multiple
times, and adding guards breaks them. I'll add comments in the files
in a later commit.
Change-Id: Id6c4fdf2811045604cc0acd30135cc09c4c0ca3c
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/soc/broadcom/cygnus/include/soc/ns16550.h
M src/soc/intel/common/block/i2c/lpss_i2c.h
M src/soc/intel/sch/smbus.h
M src/soc/nvidia/tegra124/include/soc/cache.h
M src/soc/nvidia/tegra124/include/soc/early_configs.h
M src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h
M src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h
7 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/20748/1
diff --git a/src/soc/broadcom/cygnus/include/soc/ns16550.h b/src/soc/broadcom/cygnus/include/soc/ns16550.h
index b95bf88..cc7da2e 100644
--- a/src/soc/broadcom/cygnus/include/soc/ns16550.h
+++ b/src/soc/broadcom/cygnus/include/soc/ns16550.h
@@ -17,6 +17,9 @@
* GNU General Public License for more details.
*/
+#ifndef __BROADCOM_CYGNUS_NS16550_H__
+#define __BROADCOM_CYGNUS_NS16550_H__
+
#include <stdint.h>
struct ns16550 {
@@ -141,3 +144,5 @@
/* useful defaults for LCR: 8 data, 1 stop, no parity */
#define UART_LCR_8N1 0x03
+
+#endif /* __BROADCOM_CYGNUS_NS16550_H__ */
diff --git a/src/soc/intel/common/block/i2c/lpss_i2c.h b/src/soc/intel/common/block/i2c/lpss_i2c.h
index 2cb3d5e..c2bae0a 100644
--- a/src/soc/intel/common/block/i2c/lpss_i2c.h
+++ b/src/soc/intel/common/block/i2c/lpss_i2c.h
@@ -13,6 +13,9 @@
* GNU General Public License for more details.
*/
+#ifndef __INTEL_COMMON_LPSS_I2C_H__
+#define __INTEL_COMMON_LPSS_I2C_H__
+
#include <compiler.h>
#include <intelblocks/lpss_i2c.h>
@@ -89,3 +92,5 @@
enum i2c_speed speed,
const struct lpss_i2c_bus_config *bcfg,
struct lpss_i2c_speed_config *config);
+
+#endif /* __INTEL_COMMON_LPSS_I2C_H__ */
diff --git a/src/soc/intel/sch/smbus.h b/src/soc/intel/sch/smbus.h
index e34ca52..5ce8505 100644
--- a/src/soc/intel/sch/smbus.h
+++ b/src/soc/intel/sch/smbus.h
@@ -14,6 +14,9 @@
* GNU General Public License for more details.
*/
+#ifndef __INTEL_SCH_SMBUS_H__
+#define __INTEL_SCH_SMBUS_H__
+
#include <device/smbus_def.h>
static void smbus_delay(void)
@@ -92,3 +95,5 @@
}
return byte;
}
+
+#endif /* __INTEL_SCH_SMBUS_H__ */
diff --git a/src/soc/nvidia/tegra124/include/soc/cache.h b/src/soc/nvidia/tegra124/include/soc/cache.h
index 73d8e42..98b0402 100644
--- a/src/soc/nvidia/tegra124/include/soc/cache.h
+++ b/src/soc/nvidia/tegra124/include/soc/cache.h
@@ -13,4 +13,9 @@
* GNU General Public License for more details.
*/
+#ifndef __NVIDIA_TEGRA124_CACHE_H__
+#define __NVIDIA_TEGRA124_CACHE_H__
+
void configure_l2_cache(void);
+
+#endif
diff --git a/src/soc/nvidia/tegra124/include/soc/early_configs.h b/src/soc/nvidia/tegra124/include/soc/early_configs.h
index 75cf375..7583b6b 100644
--- a/src/soc/nvidia/tegra124/include/soc/early_configs.h
+++ b/src/soc/nvidia/tegra124/include/soc/early_configs.h
@@ -13,4 +13,9 @@
* GNU General Public License for more details.
*/
+#ifndef __NVIDIA_TEGRA124_EARLY_CONFIGS_H__
+#define __NVIDIA_TEGRA124_EARLY_CONFIGS_H__
+
void early_mainboard_init(void);
+
+#endif
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h b/src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h
index 0d0f9d2..34041c9 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h
@@ -27,6 +27,9 @@
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#ifndef __QUALCOMM_IPQ40XX_IPQ_TIMER_H__
+#define __QUALCOMM_IPQ40XX_IPQ_TIMER_H__
+
#define TIMER_LOAD_VAL 0x21
#define GPT_ENABLE_CLR_ON_MATCH_EN 2
@@ -35,3 +38,5 @@
#define DGT_ENABLE_EN 1
#define SPSS_TIMER_STATUS_DGT_EN (1 << 0)
+
+#endif
diff --git a/src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h b/src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h
index 7bbce24..e77e62b 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h
@@ -28,6 +28,9 @@
* SUCH DAMAGE.
*/
+#ifndef __QUALCOMM_IPQ806X_IPQ_TIMER_H__
+#define __QUALCOMM_IPQ806X_IPQ_TIMER_H__
+
#define TIMER_LOAD_VAL 0x21
#define GPT_ENABLE_CLR_ON_MATCH_EN 2
@@ -36,3 +39,5 @@
#define DGT_ENABLE_EN 1
#define SPSS_TIMER_STATUS_DGT_EN (1 << 0)
+
+#endif
--
To view, visit https://review.coreboot.org/20748
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id6c4fdf2811045604cc0acd30135cc09c4c0ca3c
Gerrit-Change-Number: 20748
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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