<p>Martin Roth has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20748">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/soc: Add guards on header files<br><br>Note that the irq_helper.h files are designed to be included multiple<br>times, and adding guards breaks them. I'll add comments in the files<br>in a later commit.<br><br>Change-Id: Id6c4fdf2811045604cc0acd30135cc09c4c0ca3c<br>Signed-off-by: Martin Roth <martinroth@google.com><br>---<br>M src/soc/broadcom/cygnus/include/soc/ns16550.h<br>M src/soc/intel/common/block/i2c/lpss_i2c.h<br>M src/soc/intel/sch/smbus.h<br>M src/soc/nvidia/tegra124/include/soc/cache.h<br>M src/soc/nvidia/tegra124/include/soc/early_configs.h<br>M src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h<br>M src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h<br>7 files changed, 35 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/20748/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/broadcom/cygnus/include/soc/ns16550.h b/src/soc/broadcom/cygnus/include/soc/ns16550.h<br>index b95bf88..cc7da2e 100644<br>--- a/src/soc/broadcom/cygnus/include/soc/ns16550.h<br>+++ b/src/soc/broadcom/cygnus/include/soc/ns16550.h<br>@@ -17,6 +17,9 @@<br> * GNU General Public License for more details.<br> */<br> <br>+#ifndef __BROADCOM_CYGNUS_NS16550_H__<br>+#define __BROADCOM_CYGNUS_NS16550_H__<br>+<br> #include <stdint.h><br> <br> struct ns16550 {<br>@@ -141,3 +144,5 @@<br> <br> /* useful defaults for LCR: 8 data, 1 stop, no parity */<br> #define UART_LCR_8N1 0x03<br>+<br>+#endif /* __BROADCOM_CYGNUS_NS16550_H__ */<br>diff --git a/src/soc/intel/common/block/i2c/lpss_i2c.h b/src/soc/intel/common/block/i2c/lpss_i2c.h<br>index 2cb3d5e..c2bae0a 100644<br>--- a/src/soc/intel/common/block/i2c/lpss_i2c.h<br>+++ b/src/soc/intel/common/block/i2c/lpss_i2c.h<br>@@ -13,6 +13,9 @@<br> * GNU General Public License for more details.<br> */<br> <br>+#ifndef __INTEL_COMMON_LPSS_I2C_H__<br>+#define __INTEL_COMMON_LPSS_I2C_H__<br>+<br> #include <compiler.h><br> #include <intelblocks/lpss_i2c.h><br> <br>@@ -89,3 +92,5 @@<br> enum i2c_speed speed,<br> const struct lpss_i2c_bus_config *bcfg,<br> struct lpss_i2c_speed_config *config);<br>+<br>+#endif /* __INTEL_COMMON_LPSS_I2C_H__ */<br>diff --git a/src/soc/intel/sch/smbus.h b/src/soc/intel/sch/smbus.h<br>index e34ca52..5ce8505 100644<br>--- a/src/soc/intel/sch/smbus.h<br>+++ b/src/soc/intel/sch/smbus.h<br>@@ -14,6 +14,9 @@<br> * GNU General Public License for more details.<br> */<br> <br>+#ifndef __INTEL_SCH_SMBUS_H__<br>+#define __INTEL_SCH_SMBUS_H__<br>+<br> #include <device/smbus_def.h><br> <br> static void smbus_delay(void)<br>@@ -92,3 +95,5 @@<br> }<br> return byte;<br> }<br>+<br>+#endif /* __INTEL_SCH_SMBUS_H__ */<br>diff --git a/src/soc/nvidia/tegra124/include/soc/cache.h b/src/soc/nvidia/tegra124/include/soc/cache.h<br>index 73d8e42..98b0402 100644<br>--- a/src/soc/nvidia/tegra124/include/soc/cache.h<br>+++ b/src/soc/nvidia/tegra124/include/soc/cache.h<br>@@ -13,4 +13,9 @@<br> * GNU General Public License for more details.<br> */<br> <br>+#ifndef __NVIDIA_TEGRA124_CACHE_H__<br>+#define __NVIDIA_TEGRA124_CACHE_H__<br>+<br> void configure_l2_cache(void);<br>+<br>+#endif<br>diff --git a/src/soc/nvidia/tegra124/include/soc/early_configs.h b/src/soc/nvidia/tegra124/include/soc/early_configs.h<br>index 75cf375..7583b6b 100644<br>--- a/src/soc/nvidia/tegra124/include/soc/early_configs.h<br>+++ b/src/soc/nvidia/tegra124/include/soc/early_configs.h<br>@@ -13,4 +13,9 @@<br> * GNU General Public License for more details.<br> */<br> <br>+#ifndef __NVIDIA_TEGRA124_EARLY_CONFIGS_H__<br>+#define __NVIDIA_TEGRA124_EARLY_CONFIGS_H__<br>+<br> void early_mainboard_init(void);<br>+<br>+#endif<br>diff --git a/src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h b/src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h<br>index 0d0f9d2..34041c9 100644<br>--- a/src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h<br>+++ b/src/soc/qualcomm/ipq40xx/include/soc/ipq_timer.h<br>@@ -27,6 +27,9 @@<br> * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br> */<br> <br>+#ifndef __QUALCOMM_IPQ40XX_IPQ_TIMER_H__<br>+#define __QUALCOMM_IPQ40XX_IPQ_TIMER_H__<br>+<br> #define TIMER_LOAD_VAL 0x21<br> <br> #define GPT_ENABLE_CLR_ON_MATCH_EN 2<br>@@ -35,3 +38,5 @@<br> #define DGT_ENABLE_EN 1<br> <br> #define SPSS_TIMER_STATUS_DGT_EN (1 << 0)<br>+<br>+#endif<br>diff --git a/src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h b/src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h<br>index 7bbce24..e77e62b 100644<br>--- a/src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h<br>+++ b/src/soc/qualcomm/ipq806x/include/soc/ipq_timer.h<br>@@ -28,6 +28,9 @@<br> * SUCH DAMAGE.<br> */<br> <br>+#ifndef __QUALCOMM_IPQ806X_IPQ_TIMER_H__<br>+#define __QUALCOMM_IPQ806X_IPQ_TIMER_H__<br>+<br> #define TIMER_LOAD_VAL 0x21<br> <br> #define GPT_ENABLE_CLR_ON_MATCH_EN 2<br>@@ -36,3 +39,5 @@<br> #define DGT_ENABLE_EN 1<br> <br> #define SPSS_TIMER_STATUS_DGT_EN (1 << 0)<br>+<br>+#endif<br></pre><p>To view, visit <a href="https://review.coreboot.org/20748">change 20748</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20748"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id6c4fdf2811045604cc0acd30135cc09c4c0ca3c </div>
<div style="display:none"> Gerrit-Change-Number: 20748 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Martin Roth <martinroth@google.com> </div>