[coreboot-gerrit] Change in coreboot[master]: Fix files with multiple newlines at the end.

Martin Roth (Code Review) gerrit at coreboot.org
Sun Jul 23 05:49:30 CEST 2017


Martin Roth has uploaded this change for review. ( https://review.coreboot.org/20704


Change subject: Fix files with multiple newlines at the end.
......................................................................

Fix files with multiple newlines at the end.

Change-Id: Iaab26033e947cb9cf299faf1ce6d40a90a9facbe
Signed-off-by: Martin Roth <martinroth at google.com>
---
M .checkpatch.conf
M src/arch/x86/include/arch/pirq_routing.h
M src/cpu/amd/agesa/family14/romstage.c
M src/lib/gnat/COPYING.RUNTIME
M src/mainboard/asus/p5gc-mx/Makefile.inc
M src/mainboard/elmex/pcm205400/buildOpts.c
M src/mainboard/google/reef/variants/coral/mainboard.c
M src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h
M src/mainboard/intel/leafhill/Kconfig.name
M src/mainboard/intel/minnow3/gpio.c
M src/mainboard/lenovo/x1_carbon_gen1/mainboard.c
M src/mainboard/pcengines/apu2/mainboard.c
M src/mainboard/purism/librem13v2/Makefile.inc
M src/soc/intel/apollolake/xdci.c
M src/soc/intel/cannonlake/bootblock/cpu.c
M src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
M src/soc/intel/cannonlake/romstage/power_state.c
M src/soc/intel/common/block/cse/Kconfig
M src/soc/intel/common/block/include/intelblocks/msr.h
M src/soc/intel/common/block/include/intelblocks/xhci.h
M src/soc/intel/common/block/sata/Kconfig
M src/soc/intel/common/block/smbus/Makefile.inc
22 files changed, 0 insertions(+), 22 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/20704/1

diff --git a/.checkpatch.conf b/.checkpatch.conf
index ad04d39..62cc5d5 100644
--- a/.checkpatch.conf
+++ b/.checkpatch.conf
@@ -28,4 +28,3 @@
 
 # Exclude the vendorcode directory
 --exclude src/vendorcode
-
diff --git a/src/arch/x86/include/arch/pirq_routing.h b/src/arch/x86/include/arch/pirq_routing.h
index 1ca7618..0117912 100644
--- a/src/arch/x86/include/arch/pirq_routing.h
+++ b/src/arch/x86/include/arch/pirq_routing.h
@@ -63,4 +63,3 @@
 void pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS]);
 
 #endif /* ARCH_PIRQ_ROUTING_H */
-
diff --git a/src/cpu/amd/agesa/family14/romstage.c b/src/cpu/amd/agesa/family14/romstage.c
index e89b2fc..23fa008 100644
--- a/src/cpu/amd/agesa/family14/romstage.c
+++ b/src/cpu/amd/agesa/family14/romstage.c
@@ -75,4 +75,3 @@
 		post_code(0x62);
 	}
 }
-
diff --git a/src/lib/gnat/COPYING.RUNTIME b/src/lib/gnat/COPYING.RUNTIME
index e1b3c69..e86f7fb 100644
--- a/src/lib/gnat/COPYING.RUNTIME
+++ b/src/lib/gnat/COPYING.RUNTIME
@@ -70,4 +70,3 @@
 The availability of this Exception does not imply any general
 presumption that third-party software is unaffected by the copyleft
 requirements of the license of GCC.
-
diff --git a/src/mainboard/asus/p5gc-mx/Makefile.inc b/src/mainboard/asus/p5gc-mx/Makefile.inc
index 9aac7e2..f3d7e76 100644
--- a/src/mainboard/asus/p5gc-mx/Makefile.inc
+++ b/src/mainboard/asus/p5gc-mx/Makefile.inc
@@ -1,3 +1,2 @@
 ramstage-y += cstates.c
 romstage-y += gpio.c
-
diff --git a/src/mainboard/elmex/pcm205400/buildOpts.c b/src/mainboard/elmex/pcm205400/buildOpts.c
index fe4e779..eb6cf33 100644
--- a/src/mainboard/elmex/pcm205400/buildOpts.c
+++ b/src/mainboard/elmex/pcm205400/buildOpts.c
@@ -294,4 +294,3 @@
 
 // Instantiate all solution relevant data.
 #include "PlatformInstall.h"
-
diff --git a/src/mainboard/google/reef/variants/coral/mainboard.c b/src/mainboard/google/reef/variants/coral/mainboard.c
index 41a8056..54c24f8 100644
--- a/src/mainboard/google/reef/variants/coral/mainboard.c
+++ b/src/mainboard/google/reef/variants/coral/mainboard.c
@@ -29,4 +29,3 @@
 	*oem_table_id = CONFIG_VARIANT_DIR;
 	*oem_revision = variant_board_sku();
 }
-
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h
index 7a8314e..2233339 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h
@@ -218,4 +218,3 @@
 #endif
 
 #endif
-
diff --git a/src/mainboard/intel/leafhill/Kconfig.name b/src/mainboard/intel/leafhill/Kconfig.name
index 391203c..bff60da 100644
--- a/src/mainboard/intel/leafhill/Kconfig.name
+++ b/src/mainboard/intel/leafhill/Kconfig.name
@@ -1,3 +1,2 @@
 config BOARD_INTEL_LEAFHILL
 	bool "Leafhill"
-
diff --git a/src/mainboard/intel/minnow3/gpio.c b/src/mainboard/intel/minnow3/gpio.c
index 4e8f926..330a242 100644
--- a/src/mainboard/intel/minnow3/gpio.c
+++ b/src/mainboard/intel/minnow3/gpio.c
@@ -348,4 +348,3 @@
 	*num = ARRAY_SIZE(sleep_gpio_table_config);
 	return sleep_gpio_table_config;
 }
-
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/mainboard.c b/src/mainboard/lenovo/x1_carbon_gen1/mainboard.c
index a61f12c..a4f2b38 100644
--- a/src/mainboard/lenovo/x1_carbon_gen1/mainboard.c
+++ b/src/mainboard/lenovo/x1_carbon_gen1/mainboard.c
@@ -34,4 +34,3 @@
 void h8_mainboard_init_dock (void)
 {
 }
-
diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c
index f82ed50..f337147 100644
--- a/src/mainboard/pcengines/apu2/mainboard.c
+++ b/src/mainboard/pcengines/apu2/mainboard.c
@@ -232,4 +232,3 @@
 	.enable_dev = mainboard_enable,
 };
 
-
diff --git a/src/mainboard/purism/librem13v2/Makefile.inc b/src/mainboard/purism/librem13v2/Makefile.inc
index eb01360..5a7131f 100644
--- a/src/mainboard/purism/librem13v2/Makefile.inc
+++ b/src/mainboard/purism/librem13v2/Makefile.inc
@@ -18,4 +18,3 @@
 ramstage-y += pei_data.c
 ramstage-y += ramstage.c
 ramstage-y += hda_verb.c
-
diff --git a/src/soc/intel/apollolake/xdci.c b/src/soc/intel/apollolake/xdci.c
index 2578fa0..4c3047c 100644
--- a/src/soc/intel/apollolake/xdci.c
+++ b/src/soc/intel/apollolake/xdci.c
@@ -89,4 +89,3 @@
 {
 	configure_host_mode_port0(dev);
 }
-
diff --git a/src/soc/intel/cannonlake/bootblock/cpu.c b/src/soc/intel/cannonlake/bootblock/cpu.c
index 5b336da..3ebe1e4 100644
--- a/src/soc/intel/cannonlake/bootblock/cpu.c
+++ b/src/soc/intel/cannonlake/bootblock/cpu.c
@@ -25,4 +25,3 @@
 		IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
 		fast_spi_cache_bios_region();
 }
-
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
index cdc40d4..e9a5b89 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
@@ -249,4 +249,3 @@
 #define NUM_GPIO_COM2_PADS	(GPD11 - GPD0 + 1)
 
 #endif
-
diff --git a/src/soc/intel/cannonlake/romstage/power_state.c b/src/soc/intel/cannonlake/romstage/power_state.c
index 2c98a9e..2c45ad9 100644
--- a/src/soc/intel/cannonlake/romstage/power_state.c
+++ b/src/soc/intel/cannonlake/romstage/power_state.c
@@ -29,4 +29,3 @@
 
 	return ps;
 }
-
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index 441ff93..321d34c 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -4,4 +4,3 @@
 	help
 	  Driver for communication with Converged Security Engine (CSE)
 	  over Host Embedded Controller Interface (HECI)
-
diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h
index 1025c28..55d0bfd 100644
--- a/src/soc/intel/common/block/include/intelblocks/msr.h
+++ b/src/soc/intel/common/block/include/intelblocks/msr.h
@@ -133,4 +133,3 @@
 
 #define SGX_SUPPORTED	(1<<2)
 #endif	/* SOC_INTEL_COMMON_MSR_H */
-
diff --git a/src/soc/intel/common/block/include/intelblocks/xhci.h b/src/soc/intel/common/block/include/intelblocks/xhci.h
index ea1f682..32ae9a2 100644
--- a/src/soc/intel/common/block/include/intelblocks/xhci.h
+++ b/src/soc/intel/common/block/include/intelblocks/xhci.h
@@ -19,4 +19,3 @@
 void soc_xhci_init(struct device *dev);
 
 #endif	/* SOC_INTEL_COMMON_BLOCK_XHCI_H */
-
diff --git a/src/soc/intel/common/block/sata/Kconfig b/src/soc/intel/common/block/sata/Kconfig
index 89ca12e..6b24f59 100644
--- a/src/soc/intel/common/block/sata/Kconfig
+++ b/src/soc/intel/common/block/sata/Kconfig
@@ -2,4 +2,3 @@
 	bool
 	help
 	  Intel Processor common SATA support
-
diff --git a/src/soc/intel/common/block/smbus/Makefile.inc b/src/soc/intel/common/block/smbus/Makefile.inc
index e33f37f..1a10fd9 100644
--- a/src/soc/intel/common/block/smbus/Makefile.inc
+++ b/src/soc/intel/common/block/smbus/Makefile.inc
@@ -6,4 +6,3 @@
 
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbuslib.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus.c
-

-- 
To view, visit https://review.coreboot.org/20704
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaab26033e947cb9cf299faf1ce6d40a90a9facbe
Gerrit-Change-Number: 20704
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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