[coreboot-gerrit] Change in coreboot[master]: sb/amd/cs5536: Remove includes of C files
Martin Roth (Code Review)
gerrit at coreboot.org
Sun Jul 16 20:47:50 CEST 2017
Martin Roth has uploaded this change for review. ( https://review.coreboot.org/20607
Change subject: sb/amd/cs5536: Remove includes of C files
......................................................................
sb/amd/cs5536: Remove includes of C files
The romstage for CS5536 platforms were including early_smbus.c and
early_setup.c. Build these into romstage from the makefile, and remove
the #includes.
Add a Kconfig option for platforms that do not use the
early smbus code.
Change-Id: I2e6a9cd859292b4dd4720b547d1ff0bbb6c319cf
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/mainboard/aaeon/pfm-540i_revb/romstage.c
M src/mainboard/amd/db800/romstage.c
M src/mainboard/amd/f2950/romstage.c
M src/mainboard/amd/norwich/romstage.c
M src/mainboard/amd/rumba/romstage.c
M src/mainboard/artecgroup/dbe61/romstage.c
M src/mainboard/bachmann/ot200/romstage.c
M src/mainboard/digitallogic/msm800sev/romstage.c
M src/mainboard/iei/pcisa-lx-800-r10/romstage.c
M src/mainboard/iei/pm-lx-800-r11/romstage.c
M src/mainboard/iei/pm-lx2-800-r10/romstage.c
M src/mainboard/lippert/hurricane-lx/romstage.c
M src/mainboard/lippert/literunner-lx/romstage.c
M src/mainboard/lippert/roadrunner-lx/romstage.c
M src/mainboard/lippert/spacerunner-lx/romstage.c
M src/mainboard/pcengines/alix1c/Kconfig
M src/mainboard/pcengines/alix1c/romstage.c
M src/mainboard/pcengines/alix2d/Kconfig
M src/mainboard/pcengines/alix2d/romstage.c
M src/mainboard/traverse/geos/romstage.c
M src/mainboard/winent/pl6064/romstage.c
M src/mainboard/wyse/s50/romstage.c
M src/southbridge/amd/cs5536/Kconfig
M src/southbridge/amd/cs5536/Makefile.inc
M src/southbridge/amd/cs5536/cs5536.h
M src/southbridge/amd/cs5536/early_setup.c
M src/southbridge/amd/cs5536/early_smbus.c
27 files changed, 36 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/20607/1
diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c
index c35a68d..7efd988 100644
--- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c
+++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c
@@ -28,8 +28,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/smsc/smscsuperio/smscsuperio.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c
index f9b682a..5ebc76d 100644
--- a/src/mainboard/amd/db800/romstage.c
+++ b/src/mainboard/amd/db800/romstage.c
@@ -25,8 +25,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627hf/w83627hf.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/amd/f2950/romstage.c b/src/mainboard/amd/f2950/romstage.c
index 6d59995..341a8ea 100644
--- a/src/mainboard/amd/f2950/romstage.c
+++ b/src/mainboard/amd/f2950/romstage.c
@@ -25,8 +25,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627hf/w83627hf.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c
index 52df856..288a647 100644
--- a/src/mainboard/amd/norwich/romstage.c
+++ b/src/mainboard/amd/norwich/romstage.c
@@ -25,8 +25,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <northbridge/amd/lx/raminit.h>
int spd_read_byte(unsigned int device, unsigned int address)
diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c
index 2568a92..4d9600a 100644
--- a/src/mainboard/amd/rumba/romstage.c
+++ b/src/mainboard/amd/rumba/romstage.c
@@ -22,8 +22,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/gx2def.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
+#include <southbridge/amd/cs5536/cs5536.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c
index 1e7d680..215d0d9 100644
--- a/src/mainboard/artecgroup/dbe61/romstage.c
+++ b/src/mainboard/artecgroup/dbe61/romstage.c
@@ -26,8 +26,6 @@
#include <southbridge/amd/cs5536/cs5536.h>
#include "spd_table.h"
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <northbridge/amd/lx/raminit.h>
int spd_read_byte(unsigned int device, unsigned int address)
diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c
index f0e502d..a40f759 100644
--- a/src/mainboard/bachmann/ot200/romstage.c
+++ b/src/mainboard/bachmann/ot200/romstage.c
@@ -27,8 +27,6 @@
#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <northbridge/amd/lx/raminit.h>
int spd_read_byte(unsigned int device, unsigned int address)
diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index dee326d..81975cf 100644
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -23,8 +23,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627hf/w83627hf.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index 6b8c73c..f5d5de4 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -26,8 +26,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627hf/w83627hf.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c
index e6cf98a..52936ad 100644
--- a/src/mainboard/iei/pm-lx-800-r11/romstage.c
+++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c
@@ -25,8 +25,6 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
-#include <southbridge/amd/cs5536/early_smbus.c>
-#include <southbridge/amd/cs5536/early_setup.c>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627ehg/w83627ehg.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c
index b0f9d33..3ea6013 100644
--- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c
+++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c
@@ -27,8 +27,6 @@
#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
-#include <southbridge/amd/cs5536/early_smbus.c>
-#include <southbridge/amd/cs5536/early_setup.c>
#include <superio/smsc/smscsuperio/smscsuperio.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c
index 9d7b565..2647ec8 100644
--- a/src/mainboard/lippert/hurricane-lx/romstage.c
+++ b/src/mainboard/lippert/hurricane-lx/romstage.c
@@ -27,9 +27,8 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
+#include <southbridge/amd/cs5536/smbus.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/ite/common/ite.h>
#include <superio/ite/it8712f/it8712f.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c
index 1474ecd..e36d4ca 100644
--- a/src/mainboard/lippert/literunner-lx/romstage.c
+++ b/src/mainboard/lippert/literunner-lx/romstage.c
@@ -28,8 +28,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
+#include <southbridge/amd/cs5536/smbus.h>
#include <superio/ite/common/ite.h>
#include <superio/ite/it8712f/it8712f.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c
index 8341178..65ddcb7 100644
--- a/src/mainboard/lippert/roadrunner-lx/romstage.c
+++ b/src/mainboard/lippert/roadrunner-lx/romstage.c
@@ -28,8 +28,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/ite/common/ite.h>
#include <superio/ite/it8712f/it8712f.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
index a73276e..897de07 100644
--- a/src/mainboard/lippert/spacerunner-lx/romstage.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -28,8 +28,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
+#include <southbridge/amd/cs5536/smbus.h>
#include <superio/ite/common/ite.h>
#include <superio/ite/it8712f/it8712f.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig
index bbd78a3..75b3d07 100644
--- a/src/mainboard/pcengines/alix1c/Kconfig
+++ b/src/mainboard/pcengines/alix1c/Kconfig
@@ -13,6 +13,7 @@
select POWER_BUTTON_DEFAULT_DISABLE
select HAVE_OPTION_TABLE
select HAVE_CMOS_DEFAULT
+ select NO_EARLY_SMBUS
config MAINBOARD_DIR
string
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index 1d43069..962e15d 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -30,10 +30,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-/* The ALIX1.C has no SMBus; the setup is hard-wired. */
-static void cs5536_enable_smbus(void) { }
-
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627hf/w83627hf.h>
diff --git a/src/mainboard/pcengines/alix2d/Kconfig b/src/mainboard/pcengines/alix2d/Kconfig
index a350e11..95a68aa 100644
--- a/src/mainboard/pcengines/alix2d/Kconfig
+++ b/src/mainboard/pcengines/alix2d/Kconfig
@@ -10,6 +10,7 @@
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
select POWER_BUTTON_FORCE_DISABLE
+ select NO_EARLY_SMBUS
config MAINBOARD_DIR
string
diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c
index c7bf9ef..750f755 100644
--- a/src/mainboard/pcengines/alix2d/romstage.c
+++ b/src/mainboard/pcengines/alix2d/romstage.c
@@ -30,11 +30,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-/* The ALIX.2D has no SMBus; the setup is hard-wired. */
-static void cs5536_enable_smbus(void) { }
-
-#include "southbridge/amd/cs5536/early_setup.c"
-
/* The part is a Hynix hy5du121622ctp-d43.
*
* HY 5D U 12 16 2 2 C <blank> T <blank> P D43
diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c
index abf2ec9..a0c1e17 100644
--- a/src/mainboard/traverse/geos/romstage.c
+++ b/src/mainboard/traverse/geos/romstage.c
@@ -26,8 +26,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <northbridge/amd/lx/raminit.h>
int spd_read_byte(unsigned int device, unsigned int address)
diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c
index 3399fc3..624163b 100644
--- a/src/mainboard/winent/pl6064/romstage.c
+++ b/src/mainboard/winent/pl6064/romstage.c
@@ -27,8 +27,6 @@
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627hf/w83627hf.h>
#include <northbridge/amd/lx/raminit.h>
diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c
index 3ebd406..8fc797c 100644
--- a/src/mainboard/wyse/s50/romstage.c
+++ b/src/mainboard/wyse/s50/romstage.c
@@ -24,8 +24,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/gx2def.h>
#include <spd.h>
-#include "southbridge/amd/cs5536/early_smbus.c"
-#include "southbridge/amd/cs5536/early_setup.c"
+#include <southbridge/amd/cs5536/cs5536.h>
static inline int spd_read_byte(unsigned int device, unsigned int address)
{
diff --git a/src/southbridge/amd/cs5536/Kconfig b/src/southbridge/amd/cs5536/Kconfig
index 93e9787..6b06c33 100644
--- a/src/southbridge/amd/cs5536/Kconfig
+++ b/src/southbridge/amd/cs5536/Kconfig
@@ -16,3 +16,12 @@
config SOUTHBRIDGE_AMD_CS5536
bool
select UDELAY_TSC
+
+if SOUTHBRIDGE_AMD_CS5536
+
+config NO_EARLY_SMBUS
+ def_bool n
+ help
+ Skip the CS5536 early SMBUS initialization.
+
+endif
diff --git a/src/southbridge/amd/cs5536/Makefile.inc b/src/southbridge/amd/cs5536/Makefile.inc
index a274fe5..4bd88ac 100644
--- a/src/southbridge/amd/cs5536/Makefile.inc
+++ b/src/southbridge/amd/cs5536/Makefile.inc
@@ -15,6 +15,9 @@
ifeq ($(CONFIG_SOUTHBRIDGE_AMD_CS5536),y)
+romstage-y += early_smbus.c
+romstage-y += early_setup.c
+
ramstage-y += cs5536.c
ramstage-y += ide.c
ramstage-y += pirq.c
diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h
index 7de9147..72dbd5c 100644
--- a/src/southbridge/amd/cs5536/cs5536.h
+++ b/src/southbridge/amd/cs5536/cs5536.h
@@ -442,6 +442,10 @@
#if defined(__PRE_RAM__)
void cs5536_setup_onchipuart(int uart);
void cs5536_disable_internal_uart(void);
+void cs5536_early_setup(void);
+
+void cs5536_enable_smbus(void);
+int smbus_read_byte(unsigned device, unsigned address);
#else
void chipsetinit(void);
#endif
diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c
index 6c69222..0ccca36 100644
--- a/src/southbridge/amd/cs5536/early_setup.c
+++ b/src/southbridge/amd/cs5536/early_setup.c
@@ -19,6 +19,12 @@
* AMD Geode GX Processor CS5536 Companion Device GeodeROM Porting Guide.
*/
+#include <arch/io.h>
+#include <cpu/x86/bist.h>
+#include <cpu/x86/msr.h>
+#include <cpu/amd/lxdef.h>
+#include "cs5536.h"
+
/**
* @brief Setup PCI IDSEL for CS5536
*/
@@ -244,7 +250,7 @@
* and we don't want to hang on serial, so they are
* commented out
*/
-static void cs5536_early_setup(void)
+void cs5536_early_setup(void)
{
msr_t msr;
diff --git a/src/southbridge/amd/cs5536/early_smbus.c b/src/southbridge/amd/cs5536/early_smbus.c
index e11b91f..ed2b942 100644
--- a/src/southbridge/amd/cs5536/early_smbus.c
+++ b/src/southbridge/amd/cs5536/early_smbus.c
@@ -13,12 +13,16 @@
* GNU General Public License for more details.
*/
+#include <arch/io.h>
#include "cs5536.h"
#include "smbus.h"
/* initialization for SMBus Controller */
-static void cs5536_enable_smbus(void)
+void cs5536_enable_smbus(void)
{
+
+ if (IS_ENABLED(CONFIG_NO_EARLY_SMBUS))
+ return;
/* Set SCL freq and enable SMB controller */
/*outb((0x20 << 1) | SMB_CTRL2_ENABLE, smbus_io_base + SMB_CTRL2); */
@@ -29,7 +33,7 @@
}
-static inline int smbus_read_byte(unsigned device, unsigned address)
+int smbus_read_byte(unsigned device, unsigned address)
{
return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
}
--
To view, visit https://review.coreboot.org/20607
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I2e6a9cd859292b4dd4720b547d1ff0bbb6c319cf
Gerrit-Change-Number: 20607
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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