[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Fix Build break

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/20568


Change subject: soc/intel/cannonlake: Fix Build break
......................................................................

soc/intel/cannonlake: Fix Build break

1.Replace outdated defination of TCO_EN to TCO_BASE_EN
2.Remove setmaxfreq() as not needed any more.

Change-Id: Id54fdfd14f1abaa592132195e6f9acfa5807626e
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/bootblock/bootblock.c
M src/soc/intel/cannonlake/bootblock/pch.c
M src/soc/intel/cannonlake/include/soc/bootblock.h
3 files changed, 1 insertion(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/20568/1

diff --git a/src/soc/intel/cannonlake/bootblock/bootblock.c b/src/soc/intel/cannonlake/bootblock/bootblock.c
index 293a104..9db9a0f 100644
--- a/src/soc/intel/cannonlake/bootblock/bootblock.c
+++ b/src/soc/intel/cannonlake/bootblock/bootblock.c
@@ -38,6 +38,5 @@
 void bootblock_soc_init(void)
 {
 	report_platform_info();
-	set_max_freq();
 	pch_early_init();
 }
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c
index 9d326bb..d294cea 100644
--- a/src/soc/intel/cannonlake/bootblock/pch.c
+++ b/src/soc/intel/cannonlake/bootblock/pch.c
@@ -139,7 +139,7 @@
 
 	/* Disable TCO in SMBUS Device first before changing Base Address */
 	reg32 = pci_read_config32(PCH_DEV_SMBUS, TCOCTL);
-	reg32 &= ~TCO_EN;
+	reg32 &= ~TCO_BASE_EN;
 	pci_write_config32(PCH_DEV_SMBUS, TCOCTL, reg32);
 
 	/* Program TCO Base */
diff --git a/src/soc/intel/cannonlake/include/soc/bootblock.h b/src/soc/intel/cannonlake/include/soc/bootblock.h
index eb4c9b0..2a6ca1f 100644
--- a/src/soc/intel/cannonlake/include/soc/bootblock.h
+++ b/src/soc/intel/cannonlake/include/soc/bootblock.h
@@ -26,6 +26,5 @@
 void pch_early_init(void);
 void pch_early_iorange_init(void);
 void report_platform_info(void);
-void set_max_freq(void);
 
 #endif

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id54fdfd14f1abaa592132195e6f9acfa5807626e
Gerrit-Change-Number: 20568
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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