<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20568">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Fix Build break<br><br>1.Replace outdated defination of TCO_EN to TCO_BASE_EN<br>2.Remove setmaxfreq() as not needed any more.<br><br>Change-Id: Id54fdfd14f1abaa592132195e6f9acfa5807626e<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/cannonlake/bootblock/bootblock.c<br>M src/soc/intel/cannonlake/bootblock/pch.c<br>M src/soc/intel/cannonlake/include/soc/bootblock.h<br>3 files changed, 1 insertion(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/20568/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/intel/cannonlake/bootblock/bootblock.c b/src/soc/intel/cannonlake/bootblock/bootblock.c<br>index 293a104..9db9a0f 100644<br>--- a/src/soc/intel/cannonlake/bootblock/bootblock.c<br>+++ b/src/soc/intel/cannonlake/bootblock/bootblock.c<br>@@ -38,6 +38,5 @@<br> void bootblock_soc_init(void)<br> {<br>     report_platform_info();<br>-      set_max_freq();<br>       pch_early_init();<br> }<br>diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c<br>index 9d326bb..d294cea 100644<br>--- a/src/soc/intel/cannonlake/bootblock/pch.c<br>+++ b/src/soc/intel/cannonlake/bootblock/pch.c<br>@@ -139,7 +139,7 @@<br> <br>        /* Disable TCO in SMBUS Device first before changing Base Address */<br>  reg32 = pci_read_config32(PCH_DEV_SMBUS, TCOCTL);<br>-    reg32 &= ~TCO_EN;<br>+        reg32 &= ~TCO_BASE_EN;<br>    pci_write_config32(PCH_DEV_SMBUS, TCOCTL, reg32);<br> <br>  /* Program TCO Base */<br>diff --git a/src/soc/intel/cannonlake/include/soc/bootblock.h b/src/soc/intel/cannonlake/include/soc/bootblock.h<br>index eb4c9b0..2a6ca1f 100644<br>--- a/src/soc/intel/cannonlake/include/soc/bootblock.h<br>+++ b/src/soc/intel/cannonlake/include/soc/bootblock.h<br>@@ -26,6 +26,5 @@<br> void pch_early_init(void);<br> void pch_early_iorange_init(void);<br> void report_platform_info(void);<br>-void set_max_freq(void);<br> <br> #endif<br></pre><p>To view, visit <a href="https://review.coreboot.org/20568">change 20568</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20568"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id54fdfd14f1abaa592132195e6f9acfa5807626e </div>
<div style="display:none"> Gerrit-Change-Number: 20568 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>