[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add microcode support

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/20484


Change subject: soc/intel/cannonlake: Add microcode support
......................................................................

soc/intel/cannonlake: Add microcode support

Microcode need to loadded prior to FSP initialization.

Change-Id: Idd70bd3e6555866d9bb232e8904aed4120c79fe7
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/Makefile.inc
2 files changed, 3 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/20484/2

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 3012c61..de8125f 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -18,6 +18,7 @@
 	select UDELAY_TSC
 	select REG_SCRIPT
 	select C_ENVIRONMENT_BOOTBLOCK
+	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
 	select HAVE_HARD_RESET
 	select HAVE_INTEL_FIRMWARE
 	select INTEL_CAR_NEM_ENHANCED
@@ -35,6 +36,7 @@
 	select SOC_INTEL_COMMON_BLOCK_SMBUS
 	select SOC_INTEL_COMMON_BLOCK_RTC
 	select SOC_INTEL_COMMON_BLOCK_CSE
+	select SUPPORT_CPU_UCODE_IN_CBFS
 
 config UART_DEBUG
 	bool "Enable UART debug port."
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index 4651a23..bf14092 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -1,6 +1,6 @@
 ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE),y)
 
-romstage-y += cbmem.c
+subdirs-y += ../../../cpu/intel/microcode
 
 ramstage-y += cbmem.c
 

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Idd70bd3e6555866d9bb232e8904aed4120c79fe7
Gerrit-Change-Number: 20484
Gerrit-PatchSet: 2
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Andrey Petrov <andrey.petrov at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: John Zhao <john.zhao at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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