[coreboot-gerrit] New patch to review for coreboot: mainboard/intel/kblrvp: Generate required nhlt tables

Rizwan Qureshi (rizwan.qureshi@intel.com) gerrit at coreboot.org
Tue Jan 24 09:41:01 CET 2017


Rizwan Qureshi (rizwan.qureshi at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18218

-gerrit

commit ece3b52162e5d720ad39ed8098ae6b645a2b5c15
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date:   Tue Jan 24 13:52:20 2017 +0530

    mainboard/intel/kblrvp: Generate required nhlt tables
    
    Change-Id: I0978f3d1d002067ac801291c077fdaa7eda714d7
    Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
---
 src/mainboard/intel/kblrvp/Kconfig     |  7 +++++
 src/mainboard/intel/kblrvp/mainboard.c | 48 ++++++++++++++++++++++++++++++++++
 2 files changed, 55 insertions(+)

diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig
index 296b922..f68d8ca 100644
--- a/src/mainboard/intel/kblrvp/Kconfig
+++ b/src/mainboard/intel/kblrvp/Kconfig
@@ -53,6 +53,13 @@ config VARIANT_DIR
 	default "rvp3" if BOARD_INTEL_KBLRVP3
 	default "rvp7" if BOARD_INTEL_KBLRVP7
 
+config INCLUDE_NHLT_BLOBS
+	bool "Include blobs for audio."
+	select NHLT_DMIC_2CH
+	select NHLT_DMIC_4CH
+	select NHLT_RT5663 if BOARD_INTEL_KBLRVP3
+	select NHLT_MAX98927 if BOARD_INTEL_KBLRVP3
+
 config MAINBOARD_PART_NUMBER
 	string
 	default "Kblrvp"
diff --git a/src/mainboard/intel/kblrvp/mainboard.c b/src/mainboard/intel/kblrvp/mainboard.c
index 652af73..a14b436 100644
--- a/src/mainboard/intel/kblrvp/mainboard.c
+++ b/src/mainboard/intel/kblrvp/mainboard.c
@@ -32,6 +32,53 @@ static void mainboard_init(device_t dev)
 		mainboard_ec_init();
 }
 
+static unsigned long mainboard_write_acpi_tables(
+	device_t device, unsigned long current, acpi_rsdp_t *rsdp)
+{
+	uintptr_t start_addr;
+	uintptr_t end_addr;
+	struct nhlt *nhlt;
+	const char *oem_id = NULL;
+	const char *oem_table_id = NULL;
+	uint32_t oem_revision = 0;
+
+	start_addr = current;
+
+	nhlt = nhlt_init();
+
+	if (nhlt == NULL)
+		return start_addr;
+
+	/* 2 Channel DMIC array. */
+	if (nhlt_soc_add_dmic_array(nhlt, 2))
+		printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n");
+
+
+	/* 4 Channel DMIC array. */
+	if (nhlt_soc_add_dmic_array(nhlt, 4))
+		printk(BIOS_ERR, "Couldn't add 4CH DMIC arrays.\n");
+	/*ToDo as im getting error, i'm reverting to old codecs*/
+	/* MAXIM98927 Smart Amps for left and right channel */
+	if (nhlt_soc_add_max98927(nhlt, AUDIO_LINK_SSP0)){
+
+		printk(BIOS_ERR, "Couldn't add max98927\n");
+		oem_id = oem_id_maxim;
+		oem_table_id = oem_table_id_maxim;
+	}
+
+	/* RT5663 Headset codec. */
+	if (nhlt_soc_add_rt5663(nhlt, AUDIO_LINK_SSP1))
+		printk(BIOS_ERR, "Couldn't add headset codec.\n");
+
+	end_addr = nhlt_soc_serialize_oem_overrides(nhlt, start_addr,
+			 oem_id, oem_table_id, oem_revision);
+
+	if (end_addr != start_addr)
+		acpi_add_table(rsdp, (void *)start_addr);
+
+	return end_addr;
+}
+
 /*
  * mainboard_enable is executed as first thing after
  * enumerate_buses().
@@ -39,6 +86,7 @@ static void mainboard_init(device_t dev)
 static void mainboard_enable(device_t dev)
 {
 	dev->ops->init = mainboard_init;
+	dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
 	dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
 }
 



More information about the coreboot-gerrit mailing list