[coreboot-gerrit] New patch to review for coreboot: mainboard/google/poppy: SD card changes
Furquan Shaikh (furquan@google.com)
gerrit at coreboot.org
Sat Jan 14 02:36:05 CET 2017
Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18138
-gerrit
commit 73531fa8a9fc376eb8512a89c910f7113824ec35
Author: Furquan Shaikh <furquan at chromium.org>
Date: Fri Jan 13 17:27:36 2017 -0800
mainboard/google/poppy: SD card changes
1. Disable WP
2. Pass SD card detect info in ACPI
BUG=chrome-os-partner:60713
BRANCH=None
TEST=Verified that OS is able to detect SD card and read/write to it.
Change-Id: Ide84d4b86c0fac50a07520dfd76d6d3a921f2ecc
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
src/mainboard/google/poppy/devicetree.cb | 3 +++
src/mainboard/google/poppy/gpio.h | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/google/poppy/devicetree.cb b/src/mainboard/google/poppy/devicetree.cb
index 8699bc1..a9e0cef 100644
--- a/src/mainboard/google/poppy/devicetree.cb
+++ b/src/mainboard/google/poppy/devicetree.cb
@@ -185,6 +185,9 @@ chip soc/intel/skylake
register "speed_shift_enable" = "1"
register "tdp_pl2_override" = "7"
+ # Use default SD card detect GPIO configuration
+ register "sdcard_cd_gpio_default" = "GPP_G7"
+
device cpu_cluster 0 on
device lapic 0 on end
end
diff --git a/src/mainboard/google/poppy/gpio.h b/src/mainboard/google/poppy/gpio.h
index 914b8ed..0a2544c 100644
--- a/src/mainboard/google/poppy/gpio.h
+++ b/src/mainboard/google/poppy/gpio.h
@@ -210,7 +210,7 @@ static const struct pad_config gpio_table[] = {
/* SD_DATA3 */ PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1),
/* SD_CD# */ PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
/* SD_CLK */ PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1),
-/* SD_WP */ PAD_CFG_NF(GPP_G7, NONE, DEEP, NF1),
+/* SD_WP */ PAD_CFG_NF(GPP_G7, 20K_PD, DEEP, NF1),
/* BATLOW# */ PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
/* ACPRESENT */ PAD_CFG_NF(GPD1, NONE, DEEP, NF1),
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