[coreboot-gerrit] New patch to review for coreboot: amd/pi/00670F00: Add generic romstage

[Marc Jones (marc@marcjonesconsulting.com)]

Marc Jones (marc at marcjonesconsulting.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18495

-gerrit

commit aaa52be97f48f7cb9708be3c45ecf545c32b672a
Author: Marc Jones <marcj303 at gmail.com>
Date:   Thu Feb 23 11:39:50 2017 -0700

    amd/pi/00670F00: Add generic romstage
    
    Move the generic romstage code to the Stoney Ridge cpu.
    
    Change-Id: If66ac0e4b3c088f138b9282546ed1ec2d861dd74
    Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
 src/cpu/amd/pi/00670F00/Makefile.inc  |  1 +
 src/cpu/amd/pi/00670F00/romstage.c    | 56 +++++++++++++++++++++++++++++++++++
 src/cpu/amd/pi/00670F00/romstage.h    | 17 +++++++++++
 src/mainboard/amd/gardenia/romstage.c | 36 ++--------------------
 4 files changed, 77 insertions(+), 33 deletions(-)

diff --git a/src/cpu/amd/pi/00670F00/Makefile.inc b/src/cpu/amd/pi/00670F00/Makefile.inc
index 6c6a2b8..ae10485 100644
--- a/src/cpu/amd/pi/00670F00/Makefile.inc
+++ b/src/cpu/amd/pi/00670F00/Makefile.inc
@@ -14,6 +14,7 @@
 #
 
 romstage-y += fixme.c
+romstage-y += romstage.c
 ramstage-y += fixme.c
 ramstage-y += chip_name.c
 ramstage-y += model_15_init.c
diff --git a/src/cpu/amd/pi/00670F00/romstage.c b/src/cpu/amd/pi/00670F00/romstage.c
new file mode 100644
index 0000000..e305a05
--- /dev/null
+++ b/src/cpu/amd/pi/00670F00/romstage.c
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <arch/stages.h>
+#include <cbmem.h>
+#include <cpu/amd/car.h>
+#include <cpu/amd/pi/car.h>
+#include <cpu/amd/pi/00670F00/romstage.h>
+#include <console/console.h>
+#include <northbridge/amd/pi/agesawrapper.h>
+#include <northbridge/amd/pi/agesawrapper_call.h>
+#include <program_loading.h>
+
+void cache_as_ram_stage_main(void)
+{
+	post_code(0x37);
+	mainboard_romstage_entry();
+
+	post_code(0x49);
+	disable_cache_as_ram();
+
+	post_code(0x50);
+	run_ramstage();
+	post_code(0x54);  /* Should never see this post code. */
+	die("ERROR - Failed to load ramstage!");
+}
+
+/* Entry from the mainboard. */
+void romstage_common(void)
+{
+	post_code(0x38);
+	AGESAWRAPPER(amdinitreset);
+	printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n");
+
+	post_code(0x39);
+	AGESAWRAPPER(amdinitearly);
+
+	post_code(0x40);
+	AGESAWRAPPER(amdinitpost);
+
+	post_code(0x41);
+	AGESAWRAPPER(amdinitenv);
+}
diff --git a/src/cpu/amd/pi/00670F00/romstage.h b/src/cpu/amd/pi/00670F00/romstage.h
new file mode 100644
index 0000000..79e6863
--- /dev/null
+++ b/src/cpu/amd/pi/00670F00/romstage.h
@@ -0,0 +1,17 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+void mainboard_romstage_entry(void);
+void romstage_common(void);
diff --git a/src/mainboard/amd/gardenia/romstage.c b/src/mainboard/amd/gardenia/romstage.c
index 940b51a..22f079e 100644
--- a/src/mainboard/amd/gardenia/romstage.c
+++ b/src/mainboard/amd/gardenia/romstage.c
@@ -13,39 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include <console/console.h>
-#include <arch/acpi.h>
-#include <arch/io.h>
-#include <arch/stages.h>
-#include <cpu/amd/car.h>
-#include <cpu/amd/pi/car.h>
-#include <northbridge/amd/pi/agesawrapper.h>
-#include <northbridge/amd/pi/agesawrapper_call.h>
-#include <southbridge/amd/pi/hudson/hudson.h>
+#include <cpu/amd/pi/00670F00/romstage.h>
 
-void cache_as_ram_stage_main(void)
+void mainboard_romstage_entry(void)
 {
-
-	// TODO: Move all generic functions to PI generic romstage
-	post_code(0x37);
-	AGESAWRAPPER(amdinitreset);
-
-	post_code(0x38);
-	printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n");
-
-	post_code(0x39);
-	AGESAWRAPPER(amdinitearly);
-
-	post_code(0x40);
-	AGESAWRAPPER(amdinitpost);
-
-	post_code(0x41);
-	AGESAWRAPPER(amdinitenv);
-
-	disable_cache_as_ram();
-
-	post_code(0x50);
-	copy_and_run();
-
-	post_code(0x54);  /* Should never see this post code. */
+	romstage_common();
 }