[coreboot-gerrit] New patch to review for coreboot: mainboard/amd/gardenia: Remove S3 support

Marc Jones (marc@marcjonesconsulting.com) gerrit at coreboot.org
Sat Feb 25 00:49:06 CET 2017


Marc Jones (marc at marcjonesconsulting.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18494

-gerrit

commit 7a6374488d0aefbefffeea8f42f07d15683820b6
Author: Marc Jones <marcj303 at gmail.com>
Date:   Thu Feb 23 22:06:01 2017 -0700

    mainboard/amd/gardenia: Remove S3 support
    
    S3 is not yet supported for Stoney Ridge. Remove it until
    the support is written.
    
    Change-Id: I35e6c5f7ad1de7f51b018543d2f7ce82182f11e4
    Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
 src/mainboard/amd/gardenia/mainboard.c |  3 ---
 src/mainboard/amd/gardenia/romstage.c  | 32 +++++++-------------------------
 2 files changed, 7 insertions(+), 28 deletions(-)

diff --git a/src/mainboard/amd/gardenia/mainboard.c b/src/mainboard/amd/gardenia/mainboard.c
index 7ebe087..acc9b7c 100644
--- a/src/mainboard/amd/gardenia/mainboard.c
+++ b/src/mainboard/amd/gardenia/mainboard.c
@@ -84,9 +84,6 @@ static void gardenia_enable(device_t dev)
 {
 	printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
 
-	if (acpi_is_wakeup_s3())
-		agesawrapper_fchs3earlyrestore();
-
 	/* Initialize the PIRQ data structures for consumption */
 	pirq_setup();
 }
diff --git a/src/mainboard/amd/gardenia/romstage.c b/src/mainboard/amd/gardenia/romstage.c
index 1d2d05b..940b51a 100644
--- a/src/mainboard/amd/gardenia/romstage.c
+++ b/src/mainboard/amd/gardenia/romstage.c
@@ -19,48 +19,30 @@
 #include <arch/stages.h>
 #include <cpu/amd/car.h>
 #include <cpu/amd/pi/car.h>
-#include <cpu/amd/pi/s3_resume.h>
 #include <northbridge/amd/pi/agesawrapper.h>
 #include <northbridge/amd/pi/agesawrapper_call.h>
 #include <southbridge/amd/pi/hudson/hudson.h>
 
 void cache_as_ram_stage_main(void)
 {
-#if CONFIG_HAVE_ACPI_RESUME
-	void *resume_backup_memory;
-#endif
 
+	// TODO: Move all generic functions to PI generic romstage
 	post_code(0x37);
 	AGESAWRAPPER(amdinitreset);
+
 	post_code(0x38);
 	printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n");
 
 	post_code(0x39);
 	AGESAWRAPPER(amdinitearly);
-	int s3resume = acpi_is_wakeup_s3();
-	if (!s3resume) {
-		post_code(0x40);
-		AGESAWRAPPER(amdinitpost);
-		post_code(0x41);
-		AGESAWRAPPER(amdinitenv);
-		/* TODO: Disable cache is not ok. */
-		disable_cache_as_ram();
-	} else { /* S3 detect */
-		printk(BIOS_INFO, "S3 detected\n");
-
-		post_code(0x60);
-		AGESAWRAPPER(amdinitresume);
 
-		AGESAWRAPPER(amds3laterestore);
+	post_code(0x40);
+	AGESAWRAPPER(amdinitpost);
 
-		post_code(0x61);
-		prepare_for_resume();
-	}
+	post_code(0x41);
+	AGESAWRAPPER(amdinitenv);
 
-	if (s3resume || acpi_is_wakeup_s4()) {
-		outb(0xEE, PM_INDEX);
-		outb(0x8, PM_DATA);
-	}
+	disable_cache_as_ram();
 
 	post_code(0x50);
 	copy_and_run();



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