[coreboot-gerrit] New patch to review for coreboot: intel/i945: Fix up whitespace and indentation

[Paul Menzel (paulepanter@users.sourceforge.net)]

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18465

-gerrit

commit 2adc1a61740ac13aaeb3ca662876fd692e7ce2f4
Author: Paul Menzel <pmenzel at molgen.mpg.de>
Date:   Wed Feb 22 18:46:27 2017 +0100

    intel/i945: Fix up whitespace and indentation
    
    Fix up the whitespace issues introduced in commit 39bfc6cb
    (nb/i945/raminit.c: Fix dll timings on 945GC).
    
    Change-Id: I3a4152866226401bc51c7fb1752aab541a4c72b0
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/northbridge/intel/i945/raminit.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 8fe5f24..a8bb5e7 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -1238,15 +1238,15 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo)
 	/* We drive both channels with the same speed */
 	if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) {
 		switch (sysinfo->memory_frequency) {
-			case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */
-			case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */
-			case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */
+		case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */
+		case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */
+		case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */
 		}
 	} else if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
 		switch (sysinfo->memory_frequency) {
-			case 400: chan0dll = 0x33333333; chan1dll = 0x33333333; break; /* 400MHz */
-			case 533: chan0dll = 0x24242424; chan1dll = 0x24242424; break; /* 533MHz */
-			case 667: chan0dll = 0x25252525; chan1dll = 0x25252525; break; /* 667MHz */
+		case 400: chan0dll = 0x33333333; chan1dll = 0x33333333; break; /* 400MHz */
+		case 533: chan0dll = 0x24242424; chan1dll = 0x24242424; break; /* 533MHz */
+		case 667: chan0dll = 0x25252525; chan1dll = 0x25252525; break; /* 667MHz */
 		}
 	}
 
@@ -1258,7 +1258,7 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo)
 		if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
 			MCHBAR8(C0R0B00DQST + (i * 0x10) + 8) = chan0dll & 0xff;
 			MCHBAR8(C1R0B00DQST + (i * 0x10) + 8) = chan1dll & 0xff;
-                }
+		}
 	}
 }