[coreboot-gerrit] New patch to review for coreboot: southbridge/amd: Add LPC bridge acpi path for Family14 and SB800

[Tobias Diedrich (ranma+coreboot@tdiedrich.de)]

Tobias Diedrich (ranma+coreboot at tdiedrich.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18402

-gerrit

commit c02456be431ecbafff466aac720071849a7ad5b8
Author: Tobias Diedrich <ranma+openocd at tdiedrich.de>
Date:   Mon Feb 20 02:46:19 2017 +0100

    southbridge/amd: Add LPC bridge acpi path for Family14 and SB800
    
    Adds the necessary plubming for acpi_device_path() to find the LPC
    bridge on the AMD Family14 northbridge with an SB800 southbridge.
    This is necessary for TPM support since the acpi path to the LPC bridge
    (_SB.PCI0.ISAB) doesn't match the built-in default in tpm.c
    (_SB.PCI0.LPCB).
    
    Change-Id: I1ba5865d3531d8a4f41399802d58aacdf95fc604
    Signed-off-by: Tobias Diedrich <ranma+coreboot at tdiedrich.de>
---
 src/northbridge/amd/agesa/family14/northbridge.c |  9 +++++++++
 src/southbridge/amd/cimx/sb800/late.c            | 16 ++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 15bb1aa..b8d9c6f 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -638,6 +638,14 @@ static void domain_enable_resources(device_t dev)
 	printk(BIOS_DEBUG, "  ader - leaving domain_enable_resources.\n");
 }
 
+static const char *domain_acpi_name(struct device *dev)
+{
+	if (dev->path.type == DEVICE_PATH_DOMAIN)
+		return "PCI0";
+
+	return NULL;
+}
+
 /* Bus related code */
 
 static void cpu_bus_scan(struct device *dev)
@@ -813,6 +821,7 @@ static struct device_operations pci_domain_ops = {
 	.enable_resources = domain_enable_resources,
 	.init = DEVICE_NOOP,
 	.scan_bus = pci_domain_scan_bus,
+	.acpi_name = domain_acpi_name,
 };
 
 static struct device_operations cpu_bus_ops = {
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index fa47a96..a7076a6 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -34,6 +34,7 @@
 #include "sb_cimx.h"		/* AMD CIMX wrapper entries */
 #include "smbus.h"
 #include "fan.h"
+#include "pci_devs.h"
 #include <southbridge/amd/common/amd_pci_util.h>
 
 /*implement in mainboard.c*/
@@ -150,6 +151,20 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 	return current;
 }
 
+static const char *lpc_acpi_name(struct device *dev)
+{
+	if (dev->path.type != DEVICE_PATH_PCI)
+		return NULL;
+
+	switch (dev->path.pci.devfn) {
+	/* DSDT: acpi/lpc.asl */
+	case LPC_DEVFN:
+		return "LIBR";
+	}
+
+	return NULL;
+}
+
 static struct device_operations lpc_ops = {
 	.read_resources = lpc_read_resources,
 	.set_resources = lpc_set_resources,
@@ -160,6 +175,7 @@ static struct device_operations lpc_ops = {
 	.init = lpc_init,
 	.scan_bus = scan_lpc_bus,
 	.ops_pci = &lops_pci,
+	.acpi_name = lpc_acpi_name,
 };
 
 static const struct pci_driver lpc_driver __pci_driver = {